使用米联客FPGA开发板进行光口开发时遇到的问题总结

使用的开发板型号：米联客MA703FA，

实物图如下

FPGA型号为a35t

米联客提供的开发板资料中的FPGA型号为a100，所以要想使用开发板例程必须进行FPGA的重新选择。如下图

通过对开发板原理图的分析，例程代码不用做任何修改就可使用，

例程手册说明如下：

修改后一直出现如下错误：

[DRC UCIO-1] Unconstrained Logical Port: 20 out of 22 logical ports have no user assigned specific location constraint (LOC). This may cause I/O contention or incompatibility with the board power or connectivity affecting performance, signal integrity or in extreme cases cause damage to the device or the components to which it is connected. To correct this violation, specify all pin locations. This design will fail to generate a bitstream unless all logical ports have a user specified site LOC constraint defined.  To allow bitstream creation with unspecified pin locations (not recommended), use this command: set_property SEVERITY {Warning} [get_drc_checks UCIO-1].  NOTE: When using the Vivado Runs infrastructure (e.g. launch_runs Tcl command), add this command to a .tcl file and add that file as a pre-hook for write_bitstream step for the implementation run.  Problem ports: GTREFCLK0N_I[0], GTREFCLK0P_I[0], GTREFCLK1N_I[0], GTREFCLK1P_I[0], RXN_I[3:0], RXP_I[3:0], TXN_O[3:0], and TXP_O[3:0].
 

经过各种尝试，最后确定IP核需要重新生成才行。

光口不通问题分析：

1、先测试LC光缆的通断；

2、开发板可能与光模块不匹配；