野火A7学习第九次(流水灯和呼吸灯相关)

1 流水灯理论学习

一排流水灯每次点亮的时间是0.5s

2 流水灯实战演练

2.1 设计规划

2.2 波形绘制

2.3 代码编写与调试

module water_led
#(
	paramter CNT_MAX = 25'd24999_999;
)
(
	input wire sys_clk;
	input wire sys_rst_n;

	output wire [3:0] led_out;
);

reg [24:0] cnt;
reg cnt_flag;  // 脉冲标志信号

always@(posedge sys_clk or sys_rst_n)
	if(sys_rst_n == 1'b0)
		cnt <= 25'd0;
	else if(cnt == CNT_MAX)
		cnt <= 25'd0;
	else
		cnt <= cnt + 25'd1;

always@(posedge sys_clk or sys_rst_n)
	if(!sys_rst_n)
		cnt_flag <= 1'd0;
	else if(cnt == (CNT_MAX - 25'd1))
		cnt_flag <= 1'b1;
	else
		cnt_flag <= 1'b0;
	
always@(posedge sys_clk or sys_rst_n)
	if(!sys_rst_n)
		led_out <= 4'd1110;
	else if((led_out == 4'd0111) && (cnt_flag == 1'b1))
		led_out <= 4'd1110;
	else if(cnt_flag == 1'b1) 
		led_out <= led_out << 1;
	else
		led_out <= led_out;
endmodule
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40

tb仿真文件

`timescale 1ns/1ns

module tb_water_led();

reg sys_clk;
reg sys_rst_n;

wire [3:0] led_out;

initial begin
	sys_clk = 1'b1;
	sys_rst_n <= 1'b0;
	#20
	sys_rst_n <= 1'b1;
end
	
always #10 sys_clk = ~sys_clk;

// 实例化
water_led
#(
	.CNT_MAX(25'd24) 
)
water_led_inst
(
	.sys_clk(sys_clk),
	.sys_rst_n(sys_rst_n),

	.led_out(led_out)
);


endmodule
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33

2.4 代码仿真和波形对比

由于左移和右移是补0 而不是补高电平 所以不对

怎么修改？

修改代码：
用wire型

2.5 锁定管脚和上板验证

代码是低电平点亮，其实是高电平点亮。

3 呼吸灯理论学习

就像呼吸一样的灯

4 呼吸灯实战指南

4.1 设计规划

4.2 波形绘制

分为两个过程：完全熄灭到完全点亮，完全点亮到完全熄灭
如何使用PWM实现呼吸灯的效果

4.3 代码编写与调试

module breath_led
#(
	parameter CNT_1US_MAX = 6'd49,
	parameter CNT_1MS_MAX = 10'd999,
	parameter CNT_1S_MAX = 10'd999
)
(
	input wire sys_clk,
	input wire sys_rst_n,

	output wire led_out
);

reg [9:0] cnt_1s;
reg [9:0] cnt_1ms;
reg [5:0] cnt_1us;

reg cnt_en;

always@(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
		cnt_1us <= 6'd0;
	else if(cnt_1us == CNT_1US_MAX)
		cnt_1us <= 6'd0;
	else
		cnt_1us <= cnt_1us + 6'd1;


always@(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
		cnt_1ms <= 10'd0;
	else if((cnt_1ms == CNT_1MS_MAX)&&(cnt_1us == CNT_1US_MAX))
		cnt_1ms <= 10'd0;
	else if(cnt_1us == CNT_1US_MAX)
		cnt_1ms <= cnt_1ms + 10'd1;
	else
		cnt_1ms <= cnt_1ms;

always@(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
		cnt_1s <= 10'd0;
	else if((cnt_1s == CNT_1S_MAX)&&(cnt_1ms == CNT_1MS_MAX)&&(cnt_1us == CNT_1US_MAX))
		cnt_1s <= 10'd0;
	else if((cnt_1ms == CNT_1MS_MAX)&&(cnt_1us == CNT_1US_MAX))
		cnt_1s <= cnt_1s + 10'd1;
	else
		cnt_1s <= cnt_1s;

always@(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
		cnt_en <= 1'd0;
	else if((cnt_1s == CNT_1S_MAX)&&(cnt_1ms == CNT_1MS_MAX)&&(cnt_1us == CNT_1US_MAX))
		cnt_en <= ~cnt_en;
	else
		cnt_en <= cnt_en;

always@(posedge sys_clk or negedge sys_rst_n)
	if(!sys_rst_n)
		led_out<= 1'd1;
	else if(((cnt_en == 1'b0)&&(cnt_1ms <= cnt_1s) || ((cnt_en == 1'b1) && (cnt_1ms > cnt_1s)))
		led_out <= 1'd0;
	else
		led_out <= 1'b1;

endmodule
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
63
64
65

tb仿真文件

`timescale 1ns/1ns

module tb_breath_led();

reg sys_clk;
reg sys_rst_n;

wire led_out;

initial begin
	sys_clk = 1'b1;
	sys_rst_n <= 1'b0;
	#20
	sys_rst_n <= 1'b1;
end
	
always #10 sys_clk = ~sys_clk;

// 实例化
breath_led
#(
	.CNT_1US_MAX(6'd4),
	.CNT_1MS_MAX(10'd9),
	.CNT_1S_MAX(10'd9)  
)
breath_led_inst
(
	.sys_clk(sys_clk),
	.sys_rst_n(sys_rst_n),

	.led_out(led_out)
);


endmodule
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35

4.4 波形仿真和波形对比

4.5 管脚锁定和上电验证