FMC子卡设计原理图：FMCJ450-基于ADRV9009的双收双发射频FMC子卡

No.

Items

Specifications

Remark

Tx

1 

Frequency

100~6000MHz

2 

Bandwidth

Up to 450 MHz

Tx real-time bandwidth, tunable

3 

Transmission Power

17dBm

100~6000MHz, CW

4 

EVM 

<0.7% 

5

Gain Control Range

32dB

6

Gain Step

0.05 dB 

7

ACLR

< -64dBc

@0dBm output

8

Spurious 

60dBc

9

SSB Suppression

65dBc

10

LO Suppression

70dBc

11

DAC Sample Rate (max)

122.88MS/s

12

DAC Resolution

14bits

Rx 

1 

Frequency

100~6000MHz

2

Bandwidth

8 to 200 MHz

real-time bandwidth, tunable

3

Sensitivity: 

-93dBm@20MHz

Noise Figure <3dB

4

EVM 

<1.5% 

@ -30dBm input

5

Gain Control Range

6

Gain Step

0.5dB 

7

Rx Alias Band Rejection

80dB

Due to digital filters

8

Noise Figure

<3dB

Maximum RX gain 

9

IIP3 (@ typ NF)

-25dBm

10

ADC Resolution

16bits

11

ADC Wideband SFDR

78dBc

1

Voltage

3.3V& 12V

2

ON/OFF TIME 

<6uS 

TDD model

3

Duplexing Model

TDD

4

Power Consumptions

<6W