• 【ARM 裸机】模仿 STM32 驱动开发


    1、修改驱动

    对于 STM32 来说,使用了一个结构体将一个外设的所有寄存器都放在一起,在上一节的基础上进行修改;

    1.1、添加清除 bss 段代码,

    在这里插入图片描述

    1.2、添加寄存器结构体

    新建一个文件,命名imx6u.h,注意地址的连续性,不连续记得占位;
    在这里插入图片描述
    让定义的结构体和基地址联系起来
    在这里插入图片描述
    其他外设也一样,包含 CCM_Type、IOMUX_SW_MUX_Type、IOMUX_SW_PAD_Type、GPIO_Type;
    imx6u.h

    // 外设寄存器组的基地址
    #define CCM_BASE					(0X020C4000)
    #define IOMUX_SW_MUX_BASE			(0X020E0044)
    #define IOMUX_SW_PAD_BASE			(0X020E0204)
    #define GPIO1_BASE                  (0X0209C000)
    
    // CCM 外设
    typedef struct 
    {
        volatile unsigned int CCR;
        volatile unsigned int CCDR;
        volatile unsigned int CSR;
    	volatile unsigned int CCSR;
    	volatile unsigned int CACRR;
    	volatile unsigned int CBCDR;
    	volatile unsigned int CBCMR;
    	volatile unsigned int CSCMR1;
    	volatile unsigned int CSCMR2;
    	volatile unsigned int CSCDR1;
    	volatile unsigned int CS1CDR;
    	volatile unsigned int CS2CDR;
    	volatile unsigned int CDCDR;
    	volatile unsigned int CHSCCDR;
    	volatile unsigned int CSCDR2;
    	volatile unsigned int CSCDR3;	
    	volatile unsigned int RESERVED_1[2];
    	volatile unsigned int CDHIPR;  
    	volatile unsigned int RESERVED_2[2];
    	volatile unsigned int CLPCR;
    	volatile unsigned int CISR;
    	volatile unsigned int CIMR;
    	volatile unsigned int CCOSR;
    	volatile unsigned int CGPR;
    	volatile unsigned int CCGR0;
    	volatile unsigned int CCGR1;
    	volatile unsigned int CCGR2;
    	volatile unsigned int CCGR3;
    	volatile unsigned int CCGR4;
    	volatile unsigned int CCGR5;
    	volatile unsigned int CCGR6;
    	volatile unsigned int RESERVED_3[1];
    	volatile unsigned int CMEOR;
    }CCM_Type;
    
    // IOMUX 寄存器组
    typedef struct 
    {
    	volatile unsigned int JTAG_MOD;
    	volatile unsigned int JTAG_TMS;
    	volatile unsigned int JTAG_TDO;
    	volatile unsigned int JTAG_TDI;
    	volatile unsigned int JTAG_TCK;
    	volatile unsigned int JTAG_TRST_B;
    	volatile unsigned int GPIO1_IO00;
    	volatile unsigned int GPIO1_IO01;
    	volatile unsigned int GPIO1_IO02;
    	volatile unsigned int GPIO1_IO03;
    	volatile unsigned int GPIO1_IO04;
    	volatile unsigned int GPIO1_IO05;
    	volatile unsigned int GPIO1_IO06;
    	volatile unsigned int GPIO1_IO07;
    	volatile unsigned int GPIO1_IO08;
    	volatile unsigned int GPIO1_IO09;
    	volatile unsigned int UART1_TX_DATA;
    	volatile unsigned int UART1_RX_DATA;
    	volatile unsigned int UART1_CTS_B;
    	volatile unsigned int UART1_RTS_B;
    	volatile unsigned int UART2_TX_DATA;
    	volatile unsigned int UART2_RX_DATA;
    	volatile unsigned int UART2_CTS_B;
    	volatile unsigned int UART2_RTS_B;
    	volatile unsigned int UART3_TX_DATA;
    	volatile unsigned int UART3_RX_DATA;
    	volatile unsigned int UART3_CTS_B;
    	volatile unsigned int UART3_RTS_B;
    	volatile unsigned int UART4_TX_DATA;
    	volatile unsigned int UART4_RX_DATA;
    	volatile unsigned int UART5_TX_DATA;
    	volatile unsigned int UART5_RX_DATA;
    	volatile unsigned int ENET1_RX_DATA0;
    	volatile unsigned int ENET1_RX_DATA1;
    	volatile unsigned int ENET1_RX_EN;
    	volatile unsigned int ENET1_TX_DATA0;
    	volatile unsigned int ENET1_TX_DATA1;
    	volatile unsigned int ENET1_TX_EN;
    	volatile unsigned int ENET1_TX_CLK;
    	volatile unsigned int ENET1_RX_ER;
    	volatile unsigned int ENET2_RX_DATA0;
    	volatile unsigned int ENET2_RX_DATA1;
    	volatile unsigned int ENET2_RX_EN;
    	volatile unsigned int ENET2_TX_DATA0;
    	volatile unsigned int ENET2_TX_DATA1;
    	volatile unsigned int ENET2_TX_EN;
    	volatile unsigned int ENET2_TX_CLK;
    	volatile unsigned int ENET2_RX_ER;
    	volatile unsigned int LCD_CLK;
    	volatile unsigned int LCD_ENABLE;
    	volatile unsigned int LCD_HSYNC;
    	volatile unsigned int LCD_VSYNC;
    	volatile unsigned int LCD_RESET;
    	volatile unsigned int LCD_DATA00;
    	volatile unsigned int LCD_DATA01;
    	volatile unsigned int LCD_DATA02;
    	volatile unsigned int LCD_DATA03;
    	volatile unsigned int LCD_DATA04;
    	volatile unsigned int LCD_DATA05;
    	volatile unsigned int LCD_DATA06;
    	volatile unsigned int LCD_DATA07;
    	volatile unsigned int LCD_DATA08;
    	volatile unsigned int LCD_DATA09;
    	volatile unsigned int LCD_DATA10;
    	volatile unsigned int LCD_DATA11;
    	volatile unsigned int LCD_DATA12;
    	volatile unsigned int LCD_DATA13;
    	volatile unsigned int LCD_DATA14;
    	volatile unsigned int LCD_DATA15;
    	volatile unsigned int LCD_DATA16;
    	volatile unsigned int LCD_DATA17;
    	volatile unsigned int LCD_DATA18;
    	volatile unsigned int LCD_DATA19;
    	volatile unsigned int LCD_DATA20;
    	volatile unsigned int LCD_DATA21;
    	volatile unsigned int LCD_DATA22;
    	volatile unsigned int LCD_DATA23;
    	volatile unsigned int NAND_RE_B;
    	volatile unsigned int NAND_WE_B;
    	volatile unsigned int NAND_DATA00;
    	volatile unsigned int NAND_DATA01;
    	volatile unsigned int NAND_DATA02;
    	volatile unsigned int NAND_DATA03;
    	volatile unsigned int NAND_DATA04;
    	volatile unsigned int NAND_DATA05;
    	volatile unsigned int NAND_DATA06;
    	volatile unsigned int NAND_DATA07;
    	volatile unsigned int NAND_ALE;
    	volatile unsigned int NAND_WP_B;
    	volatile unsigned int NAND_READY_B;
    	volatile unsigned int NAND_CE0_B;
    	volatile unsigned int NAND_CE1_B;
    	volatile unsigned int NAND_CLE;
    	volatile unsigned int NAND_DQS;
    	volatile unsigned int SD1_CMD;
    	volatile unsigned int SD1_CLK;
    	volatile unsigned int SD1_DATA0;
    	volatile unsigned int SD1_DATA1;
    	volatile unsigned int SD1_DATA2;
    	volatile unsigned int SD1_DATA3;
    	volatile unsigned int CSI_MCLK;
    	volatile unsigned int CSI_PIXCLK;
    	volatile unsigned int CSI_VSYNC;
    	volatile unsigned int CSI_HSYNC;
    	volatile unsigned int CSI_DATA00;
    	volatile unsigned int CSI_DATA01;
    	volatile unsigned int CSI_DATA02;
    	volatile unsigned int CSI_DATA03;
    	volatile unsigned int CSI_DATA04;
    	volatile unsigned int CSI_DATA05;
    	volatile unsigned int CSI_DATA06;
    	volatile unsigned int CSI_DATA07;
    }IOMUX_SW_MUX_Type;
    
    typedef struct 
    {
    	volatile unsigned int DRAM_ADDR00;
    	volatile unsigned int DRAM_ADDR01;
    	volatile unsigned int DRAM_ADDR02;
    	volatile unsigned int DRAM_ADDR03;
    	volatile unsigned int DRAM_ADDR04;
    	volatile unsigned int DRAM_ADDR05;
    	volatile unsigned int DRAM_ADDR06;
    	volatile unsigned int DRAM_ADDR07;
    	volatile unsigned int DRAM_ADDR08;
    	volatile unsigned int DRAM_ADDR09;
    	volatile unsigned int DRAM_ADDR10;
    	volatile unsigned int DRAM_ADDR11;
    	volatile unsigned int DRAM_ADDR12;
    	volatile unsigned int DRAM_ADDR13;
    	volatile unsigned int DRAM_ADDR14;
    	volatile unsigned int DRAM_ADDR15;
    	volatile unsigned int DRAM_DQM0;
    	volatile unsigned int DRAM_DQM1;
    	volatile unsigned int DRAM_RAS_B;
    	volatile unsigned int DRAM_CAS_B;
    	volatile unsigned int DRAM_CS0_B;
    	volatile unsigned int DRAM_CS1_B;
    	volatile unsigned int DRAM_SDWE_B;
    	volatile unsigned int DRAM_ODT0;
    	volatile unsigned int DRAM_ODT1;
    	volatile unsigned int DRAM_SDBA0;
    	volatile unsigned int DRAM_SDBA1;
    	volatile unsigned int DRAM_SDBA2;
    	volatile unsigned int DRAM_SDCKE0;
    	volatile unsigned int DRAM_SDCKE1;
    	volatile unsigned int DRAM_SDCLK0_P;
    	volatile unsigned int DRAM_SDQS0_P;
    	volatile unsigned int DRAM_SDQS1_P;
    	volatile unsigned int DRAM_RESET;
    	volatile unsigned int TEST_MODE;
    	volatile unsigned int POR_B;
    	volatile unsigned int ONOFF;
    	volatile unsigned int SNVS_PMIC_ON_REQ;
    	volatile unsigned int CCM_PMIC_STBY_REQ;
    	volatile unsigned int BOOT_MODE0;
    	volatile unsigned int BOOT_MODE1;
    	volatile unsigned int SNVS_TAMPER0;
    	volatile unsigned int SNVS_TAMPER1;
    	volatile unsigned int SNVS_TAMPER2;
    	volatile unsigned int SNVS_TAMPER3;
    	volatile unsigned int SNVS_TAMPER4;
    	volatile unsigned int SNVS_TAMPER5;
    	volatile unsigned int SNVS_TAMPER6;
    	volatile unsigned int SNVS_TAMPER7;
    	volatile unsigned int SNVS_TAMPER8;
    	volatile unsigned int SNVS_TAMPER9;
    	volatile unsigned int JTAG_MOD;
    	volatile unsigned int JTAG_TMS;
    	volatile unsigned int JTAG_TDO;
    	volatile unsigned int JTAG_TDI;
    	volatile unsigned int JTAG_TCK;
    	volatile unsigned int JTAG_TRST_B;
    	volatile unsigned int GPIO1_IO00;
    	volatile unsigned int GPIO1_IO01;
    	volatile unsigned int GPIO1_IO02;
    	volatile unsigned int GPIO1_IO03;
    	volatile unsigned int GPIO1_IO04;
    	volatile unsigned int GPIO1_IO05;
    	volatile unsigned int GPIO1_IO06;
    	volatile unsigned int GPIO1_IO07;
    	volatile unsigned int GPIO1_IO08;
    	volatile unsigned int GPIO1_IO09;
    	volatile unsigned int UART1_TX_DATA;
    	volatile unsigned int UART1_RX_DATA;
    	volatile unsigned int UART1_CTS_B;
    	volatile unsigned int UART1_RTS_B;
    	volatile unsigned int UART2_TX_DATA;
    	volatile unsigned int UART2_RX_DATA;
    	volatile unsigned int UART2_CTS_B;
    	volatile unsigned int UART2_RTS_B;
    	volatile unsigned int UART3_TX_DATA;
    	volatile unsigned int UART3_RX_DATA;
    	volatile unsigned int UART3_CTS_B;
    	volatile unsigned int UART3_RTS_B;
    	volatile unsigned int UART4_TX_DATA;
    	volatile unsigned int UART4_RX_DATA;
    	volatile unsigned int UART5_TX_DATA;
    	volatile unsigned int UART5_RX_DATA;
    	volatile unsigned int ENET1_RX_DATA0;
    	volatile unsigned int ENET1_RX_DATA1;
    	volatile unsigned int ENET1_RX_EN;
    	volatile unsigned int ENET1_TX_DATA0;
    	volatile unsigned int ENET1_TX_DATA1;
    	volatile unsigned int ENET1_TX_EN;
    	volatile unsigned int ENET1_TX_CLK;
    	volatile unsigned int ENET1_RX_ER;
    	volatile unsigned int ENET2_RX_DATA0;
    	volatile unsigned int ENET2_RX_DATA1;
    	volatile unsigned int ENET2_RX_EN;
    	volatile unsigned int ENET2_TX_DATA0;
    	volatile unsigned int ENET2_TX_DATA1;
    	volatile unsigned int ENET2_TX_EN;
    	volatile unsigned int ENET2_TX_CLK;
    	volatile unsigned int ENET2_RX_ER;
    	volatile unsigned int LCD_CLK;
    	volatile unsigned int LCD_ENABLE;
    	volatile unsigned int LCD_HSYNC;
    	volatile unsigned int LCD_VSYNC;
    	volatile unsigned int LCD_RESET;
    	volatile unsigned int LCD_DATA00;
    	volatile unsigned int LCD_DATA01;
    	volatile unsigned int LCD_DATA02;
    	volatile unsigned int LCD_DATA03;
    	volatile unsigned int LCD_DATA04;
    	volatile unsigned int LCD_DATA05;
    	volatile unsigned int LCD_DATA06;
    	volatile unsigned int LCD_DATA07;
    	volatile unsigned int LCD_DATA08;
    	volatile unsigned int LCD_DATA09;
    	volatile unsigned int LCD_DATA10;
    	volatile unsigned int LCD_DATA11;
    	volatile unsigned int LCD_DATA12;
    	volatile unsigned int LCD_DATA13;
    	volatile unsigned int LCD_DATA14;
    	volatile unsigned int LCD_DATA15;
    	volatile unsigned int LCD_DATA16;
    	volatile unsigned int LCD_DATA17;
    	volatile unsigned int LCD_DATA18;
    	volatile unsigned int LCD_DATA19;
    	volatile unsigned int LCD_DATA20;
    	volatile unsigned int LCD_DATA21;
    	volatile unsigned int LCD_DATA22;
    	volatile unsigned int LCD_DATA23;
    	volatile unsigned int NAND_RE_B;
    	volatile unsigned int NAND_WE_B;
    	volatile unsigned int NAND_DATA00;
    	volatile unsigned int NAND_DATA01;
    	volatile unsigned int NAND_DATA02;
    	volatile unsigned int NAND_DATA03;
    	volatile unsigned int NAND_DATA04;
    	volatile unsigned int NAND_DATA05;
    	volatile unsigned int NAND_DATA06;
    	volatile unsigned int NAND_DATA07;
    	volatile unsigned int NAND_ALE;
    	volatile unsigned int NAND_WP_B;
    	volatile unsigned int NAND_READY_B;
    	volatile unsigned int NAND_CE0_B;
    	volatile unsigned int NAND_CE1_B;
    	volatile unsigned int NAND_CLE;
    	volatile unsigned int NAND_DQS;
    	volatile unsigned int SD1_CMD;
    	volatile unsigned int SD1_CLK;
    	volatile unsigned int SD1_DATA0;
    	volatile unsigned int SD1_DATA1;
    	volatile unsigned int SD1_DATA2;
    	volatile unsigned int SD1_DATA3;
    	volatile unsigned int CSI_MCLK;
    	volatile unsigned int CSI_PIXCLK;
    	volatile unsigned int CSI_VSYNC;
    	volatile unsigned int CSI_HSYNC;
    	volatile unsigned int CSI_DATA00;
    	volatile unsigned int CSI_DATA01;
    	volatile unsigned int CSI_DATA02;
    	volatile unsigned int CSI_DATA03;
    	volatile unsigned int CSI_DATA04;
    	volatile unsigned int CSI_DATA05;
    	volatile unsigned int CSI_DATA06;
    	volatile unsigned int CSI_DATA07;
    	volatile unsigned int GRP_ADDDS;
    	volatile unsigned int GRP_DDRMODE_CTL;
    	volatile unsigned int GRP_B0DS;
    	volatile unsigned int GRP_DDRPK;
    	volatile unsigned int GRP_CTLDS;
    	volatile unsigned int GRP_B1DS;
    	volatile unsigned int GRP_DDRHYS;
    	volatile unsigned int GRP_DDRPKE;
    	volatile unsigned int GRP_DDRMODE;
    	volatile unsigned int GRP_DDR_TYPE;
    }IOMUX_SW_PAD_Type;
    
    // GPIO寄存器结构体
    typedef struct 
    {
    	volatile unsigned int DR;							
    	volatile unsigned int GDIR; 							
    	volatile unsigned int PSR;								
    	volatile unsigned int ICR1; 							
    	volatile unsigned int ICR2; 							 
    	volatile unsigned int IMR;								 
    	volatile unsigned int ISR;			
    	volatile unsigned int EDGE_SEL;  
    }GPIO_Type;
    
    // 外设指针 
    #define CCM					((CCM_Type *)CCM_BASE)
    #define IOMUX_SW_MUX		((IOMUX_SW_MUX_Type *)IOMUX_SW_MUX_BASE)
    #define IOMUX_SW_PAD		((IOMUX_SW_PAD_Type *)IOMUX_SW_PAD_BASE)
    #define GPIO1				((GPIO_Type *)GPIO1_BASE)
    
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    2、修改 main.c;

    在这里插入图片描述

    #include "imx6u.h"
    
    // 使能外设时钟
    void clk_enable(void)
    {
        CCM->CCGR0 = 0xffffffff;
    	CCM->CCGR1 = 0xffffffff;
    	CCM->CCGR2 = 0xffffffff;
    	CCM->CCGR3 = 0xffffffff;
    	CCM->CCGR4 = 0xffffffff;
    	CCM->CCGR5 = 0xffffffff;
    	CCM->CCGR6 = 0xffffffff;
    }
    
    // 初始化 led
    void led_init(void)
    {
        IOMUX_SW_MUX->GPIO1_IO03 = 0x5;   // 复用为 GPIO1_IO03
        IOMUX_SW_PAD->GPIO1_IO03 =0x10b0;   // 配置电气属性
    
        // GPIO 初始化
        GPIO1->GDIR = 0x8;   // 设置为输出
        GPIO1->DR = 0x0;   // 打开 led
    }
    
    // 短延时
    void delay_short(volatile unsigned int n)
    {
        while(n--){}
    }
    
    // 长延时,在 396MHz 下一次循环大概 1 ms
    void delay_ms(volatile unsigned int n)
    {
        while(n--)
        {
            delay_short(0x7ff);
        }
    } 
    
    // 打开 led
    void led_on(void)
    {
        GPIO1->DR &= ~(1<<3);   // bit3 清零
    }
    
    // 关闭 led
    void led_off(void)
    {
        GPIO1->DR |= (1<<3);   // bit3 置1
    }
    
    int main(void)
    {
        clk_enable();
        led_init();
    
        // led 闪烁
        while(1)
        {
            led_off();
            delay_ms(100);
            led_on();
            delay_ms(100);
        }
        return 0; 
    }
    
    
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    3、修改 Makefile;

    在这里插入图片描述

    objs    := start.o main.o
    gcc     := arm-linux-gnueabihf-gcc
    ld      := arm-linux-gnueabihf-ld
    objcopy := arm-linux-gnueabihf-objcopy
    objdump := arm-linux-gnueabihf-objdump
    
    ledc.bin : $(objs)
    	$(ld) -Timx6u.lds -o ledc.elf $^
    	$(objcopy) -O binary -S ledc.elf $@
    	$(objdump) -D -m arm ledc.elf > ledc.dis
    
    %.o : %.c
    	$(gcc) -Wall -nostdlib -c -O2 -o $@ $<
    
    %.o : %.s
    	$(gcc) -Wall -nostdlib -c -O2 -o $@ $<
    
    clean:
    	rm -rf *.o ledc.bin ledc.elf ledc.dis
    
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    给出连接脚本

    SECTIONS{
    	. = 0X87800000;
    	.text :
    	{
    		start.o 
    		*(.text)
    	}
    	.rodata ALIGN(4) : {*(.rodata*)}     
    	.data ALIGN(4)   : { *(.data) }    
    	__bss_start = .;    
    	.bss ALIGN(4)  : { *(.bss)  *(COMMON) }    
    	__bss_end = .;
    }
    
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    4、编译烧写验证;

    在这里插入图片描述

    I.MX6ULL_ledc_stm32

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  • 原文地址:https://blog.csdn.net/ZSW2027008838/article/details/138036345