• （六）正点原子STM32MP135移植——内核移植

    目录

    一、概述

    二、编译官方代码

    三、移植

    四、编译

    一、概述

            前面已经移植好了TF-A、optee、u-boot，在u-boot能正常跑起来的情况下，现在来移植内核。

    二、编译官方代码

            进入kernel目录

    2.1 解压源码、打补丁

    1. /* 解压源码 */
    2. tar xf linux-6.1.28.tar.xz
    3.  
    4. /* 进入源码目录 */
    5. cd linux-6.1.28/
    6.  
    7. /* 打补丁 */
    8. for p in `ls -1 ../*.patch`; do patch -p1 < $p; done

    2.2 配置Kernel

            根据官方手册进行配置即可

    1. /* 配置交叉编译器 */
    2. source /opt/st/stm32mp1/4.2.1-openstlinux-6.1-yocto-mickledore-mp1-v23.06.21/environment-setup-cortexa7t2hf-neon-vfpv4-ostl-linux-gnueabi 
    3.  
    4. /* 输出文件夹 */
    5. export OUTPUT_BUILD_DIR=$PWD/../build
    6. mkdir -p ${OUTPUT_BUILD_DIR}
    7.  
    8. /* 默认配置文件 */
    9. make ARCH=arm O="${OUTPUT_BUILD_DIR}" multi_v7_defconfig fragment*.config

    2.3 编译内核

            编译模块好像要好久，可以不要编译

    1. /* 编译uImage 设备树 */
    2. make ARCH=arm uImage vmlinux dtbs LOADADDR=0xC2000040 O="${OUTPUT_BUILD_DIR}"
    3.  
    4. /* 编译模块 */
    5. make ARCH=arm modules O="${OUTPUT_BUILD_DIR}"
    6.  
    7. /* 配置输出文件路径 */
    8. make ARCH=arm INSTALL_MOD_PATH="${OUTPUT_BUILD_DIR}/install_artifact" modules_install O="${OUTPUT_BUILD_DIR}"
    9. mkdir -p ${OUTPUT_BUILD_DIR}/install_artifact/boot/
    10.  
    11. /* 拷贝输出文件 */
    12. cp ${OUTPUT_BUILD_DIR}/arch/arm/boot/uImage ${OUTPUT_BUILD_DIR}/install_artifact/boot/
    13. cp ${OUTPUT_BUILD_DIR}/arch/arm/boot/dts/st*.dtb ${OUTPUT_BUILD_DIR}/install_artifact/boot/

            这时候去查看build/install_artifact目录下，有boot和lib两个文件夹，boot里有uImage和设备树，lib里是内核模块

    三、移植

    3.1 复制文件

    1. /* 进入设备树目录 */
    2. cd arch/arm/boot/dts/
    3.  
    4. cp stm32mp135f-dk.dts stm32mp135-atk.dts
    5. cp stm32mp13-pinctrl.dtsi stm32mp135-pinctrl-atk.dtsi
    6.  
    7. /* 回到源码根目录 */
    8. cd ../../../../

    3.2 修改头文件

            打开stm32mp135-atk.dts，把引脚头文件改成我们的

    1. // #include "stm32mp13-pinctrl.dtsi"
    2. #include "stm32mp13-pinctrl-atk.dtsi"

    3.3 修改电源

            首先找到&scmi_regu节点，全都干掉

    1. // &scmi_regu {
    2. // 	scmi_vddcpu: voltd-vddcpu {
    3. // 		reg = ;
    4. // 		regulator-name = "vddcpu";
    5. // 	};
    6. // 	scmi_vdd: voltd-vdd {
    7. // 		reg = ;
    8. // 		regulator-name = "vdd";
    9. // 	};
    10. // 	scmi_vddcore: voltd-vddcore {
    11. // 		reg = ;
    12. // 		regulator-name = "vddcore";
    13. // 	};
    14. // 	scmi_vdd_adc: voltd-vdd-adc {
    15. // 		reg = ;
    16. // 		regulator-name = "vdd_adc";
    17. // 	};
    18. // 	scmi_vdd_usb: voltd-vdd-usb {
    19. // 		reg = ;
    20. // 		regulator-name = "vdd_usb";
    21. // 	};
    22. // 	scmi_vdd_sd: voltd-vdd-sd {
    23. // 		reg = ;
    24. // 		regulator-name = "vdd_sd";
    25. // 	};
    26. // 	scmi_v1v8_periph: voltd-v1v8-periph {
    27. // 		reg = ;
    28. // 		regulator-name = "v1v8_periph";
    29. // 	};
    30. // 	scmi_v3v3_sw: voltd-v3v3-sw {
    31. // 		reg = ;
    32. // 		regulator-name = "v3v3_sw";
    33. // 	};
    34. // };

            去根节点下添加我们对电源的描述，找到v3v3_ao这个节点，把它删了，替换成我们的

    1. 	// v3v3_ao: v3v3-ao {
    2. 	// 	compatible = "regulator-fixed";
    3. 	// 	regulator-name = "v3v3_ao";
    4. 	// 	regulator-min-microvolt = <3300000>;
    5. 	// 	regulator-max-microvolt = <3300000>;
    6. 	// 	regulator-always-on;
    7. 	// };
    8. vddcore: vddcore {
    9.         compatible = "regulator-fixed";
    10.         regulator-name = "vddcore";
    11.         regulator-min-microvolt = <1250000>;
    12.         regulator-max-microvolt = <1250000>;
    13.         regulator-off-in-suspend;
    14.         regulator-always-on;
    15. 	};
    16.  
    17. 	vddcpu: vddcpu {
    18. 		compatible = "regulator-fixed";
    19. 		regulator-name = "vddcpu";
    20. 		regulator-min-microvolt = <1350000>;
    21. 		regulator-max-microvolt = <1350000>;
    22.         regulator-off-in-suspend;
    23.         regulator-always-on;
    24. 	};
    25.  
    26. 	v3v3: v3v3 {
    27.         compatible = "regulator-fixed";
    28.         regulator-name = "v3v3";
    29.         regulator-min-microvolt = <3300000>;
    30.         regulator-max-microvolt = <3300000>;
    31.         regulator-off-in-suspend;
    32.         regulator-always-on;
    33.     };
    34.  
    35. 	vbus_otg: vbus_otg {
    36.         compatible = "regulator-fixed";
    37.         regulator-name = "vbus_otg";
    38.         regulator-min-microvolt = <5000000>;
    39.         regulator-max-microvolt = <5000000>;
    40.         regulator-off-in-suspend;
    41. 		regulator-always-on;
    42.     };
    43.  
    44. 	vdd: vdd {
    45.         compatible = "regulator-fixed";
    46.         regulator-name = "vdd";
    47.         regulator-min-microvolt = <3300000>;
    48.         regulator-max-microvolt = <3300000>;
    49.         regulator-off-in-suspend;
    50.         regulator-always-on;
    51.     };
    52.  
    53. 	vdd_usb: vdd_usb {
    54.         compatible = "regulator-fixed";
    55.         regulator-name = "vdd_usb";
    56.         regulator-min-microvolt = <3300000>;
    57.         regulator-max-microvolt = <3300000>;
    58.         regulator-off-in-suspend;
    59.         regulator-always-on;
    60.     };
    61.  
    62. 	v1v8_audio: regulator-v1v8_audio {
    63.  		compatible = "regulator-fixed";
    64.  		regulator-name = "v1v8_audio";
    65.  		regulator-min-microvolt = <1800000>;
    66.  		regulator-max-microvolt = <1800000>;
    67.  		regulator-always-on;
    68.  		regulator-boot-on;
    69. 	};
    70.  
    71.     v3v3_hdmi: regulator-v3v3-hdmi {
    72.         compatible = "regulator-fixed";
    73.         regulator-name = "v3v3_hdmi";
    74.         regulator-min-microvolt = <3300000>;
    75.         regulator-max-microvolt = <3300000>;
    76.         regulator-always-on;
    77.         regulator-boot-on;
    78.     };
    79.  
    80.     v1v2_hdmi: regulator-v1v2-hdmi {
    81.         compatible = "regulator-fixed";
    82.         regulator-name = "v1v2_hdmi";
    83.         regulator-min-microvolt = <1200000>;
    84.         regulator-max-microvolt = <1200000>;
    85.         regulator-always-on;
    86.         regulator-boot-on;
    87.     };

    3.4 添加看门狗

            由于笔者前面移植u-boot、optee、TF-A哪里遗忘了一个iwdg2，正点原子使用的是iwdg2，而ST官方使用的是arm_wdt，如果前面用到了iwdg2，那就在这里添加上，如果没有则pass这一部分

    1. &iwdg2 {
    2. 	timeout-sec = <32>;
    3. 	status = "okay";
    4. };

    3.5 修改网络

            找到eth1和eth2，修改成正点原子的

    1. ð1 {
    2. 	status = "okay";
    3. 	pinctrl-0 = <ð1_rgmii_pins_a>;
    4. 	pinctrl-1 = <ð1_rgmii_sleep_pins_a>;
    5. 	pinctrl-names = "default", "sleep";
    6. 	phy-mode = "rgmii-id";
    7. 	max-speed = <1000>;
    8. 	phy-handle = <&phy0_eth1>;
    9. 	nvmem-cells = <ðernet_mac1_address>;
    10. 	nvmem-cell-names = "mac-address";
    11.  
    12. 	mdio1 {
    13. 		#address-cells = <1>;
    14. 		#size-cells = <0>;
    15. 		compatible = "snps,dwmac-mdio";
    16. 		phy0_eth1: ethernet-phy@1 {
    17.             reg = <1>;
    18. 		};
    19. 	};
    20. };
    21.  
    22. ð2 {
    23. 	status = "okay";
    24. 	pinctrl-0 = <ð2_rgmii_pins_a>;
    25. 	pinctrl-1 = <ð2_rgmii_sleep_pins_a>;
    26. 	pinctrl-names = "default", "sleep";
    27. 	phy-mode = "rgmii-id";
    28. 	max-speed = <1000>;
    29. 	phy-handle = <&phy0_eth2>;
    30. 	phy-supply = <&v3v3>;
    31. 	nvmem-cells = <ðernet_mac2_address>;
    32. 	nvmem-cell-names = "mac-address";
    33.  
    34. 	mdio1 {
    35. 		#address-cells = <1>;
    36. 		#size-cells = <0>;
    37. 		compatible = "snps,dwmac-mdio";
    38. 		phy0_eth2: ethernet-phy@2 {
    39.             reg = <2>;
    40. 		};
    41. 	};
    42. };

    3.6 修改sdmmc

            找到sdmmc1和sdmmc2，修改成我们的

    1. &sdmmc1 {
    2. 	pinctrl-names = "default", "opendrain", "sleep";
    3. 	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;
    4. 	pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>;
    5. 	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
    6. 	cd-gpios = <&gpiof 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
    7. 	st,neg-edge;
    8.  	no-1-8-v;
    9. 	bus-width = <4>;
    10. 	vmmc-supply = <&v3v3>;
    11. 	#address-cells = <1>;
    12. 	#size-cells = <0>;
    13. 	status = "okay";
    14. };
    15.  
    16. /* EMMC */
    17. &sdmmc2 {
    18. 	pinctrl-names = "default", "opendrain", "sleep";
    19. 	pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_b4_b7_pins_a &sdmmc2_clk_pins_a>;
    20. 	pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_b4_b7_od_pins_a &sdmmc2_clk_pins_a>;
    21. 	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_b4_b7_sleep_pins_a>;
    22. 	non-removable;
    23. 	st,neg-edge;
    24.  	mmc-ddr-3_3v;
    25.  	no-1-8-v;
    26. 	bus-width = <8>;
    27. 	vmmc-supply = <&v3v3>;
    28. 	keep-power-in-suspend;
    29. 	#address-cells = <1>;
    30. 	#size-cells = <0>;
    31. 	status = "okay";
    32. };

    3.7 删掉其它

            如果根文件系统是在emmc里，只需要修改一个sdmmc2能用就行；如果根文件系统需要通过nfs挂载，那就需要修改eth1和eth2节点。而对于其他部分，USB、OTG、LCD等外设，都是可以删除的，这些都是正点原子会讲会移植的东西，所以笔者在这里把不需要的外设全部移除

    1.        usbh_ehci、usbotg_hs、usbphyc、usbphyc_port0、usbphyc_port1

    2.        usart1、 usart2、uart8

    3.        timers3、timers4、timers8、timers14

    4.        spi5

    5.        rtc

    6.        ltdc

    7.        i2c1、i2c5

    8.        dcmipp

    9.        adc1

    10.      根节点下：gpio-keys、leds、panel_backlight、panel_rgb、wake_up、wifi_pwrseq

            删除之后可以得到一个相对精简的设备树：

    1. // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
    2. /*
    3.  * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
    4.  * Author: Alexandre Torgue  for STMicroelectronics.
    5.  */
    6.  
    7. /dts-v1/;
    8.  
    9. #include 
    10. #include 
    11. #include 
    12. #include 
    13. #include 
    14. #include "stm32mp135.dtsi"
    15. #include "stm32mp13xf.dtsi"
    16. #include "stm32mp13-pinctrl-atk.dtsi"
    17.  
    18. / {
    19. 	model = "ATK STM32MP135-ATK Discovery Board";
    20. 	compatible = "st,stm32mp135-ATK", "st,stm32mp135";
    21.  
    22. 	aliases {
    23. 		ethernet0 = ð1;
    24. 		ethernet1 = ð2;
    25. 		serial0 = &uart4;
    26. 	};
    27.  
    28. 	chosen {
    29. 		stdout-path = "serial0:115200n8";
    30. 		#address-cells = <1>;
    31. 		#size-cells = <1>;
    32. 		ranges;
    33.  
    34. 		framebuffer {
    35. 			compatible = "simple-framebuffer";
    36. 			clocks = <&rcc LTDC_PX>;
    37. 			status = "disabled";
    38. 		};
    39. 	};
    40.  
    41. 	clocks {
    42. 		clk_ext_camera: clk-ext-camera {
    43. 			#clock-cells = <0>;
    44. 			compatible = "fixed-clock";
    45. 			clock-frequency = <24000000>;
    46. 		};
    47.  
    48. 		clk_mco1: clk-mco1 {
    49. 			#clock-cells = <0>;
    50. 			compatible = "fixed-clock";
    51. 			clock-frequency = <24000000>;
    52. 		};
    53. 	};
    54.  
    55. 	memory@c0000000 {
    56. 		device_type = "memory";
    57. 		reg = <0xc0000000 0x20000000>;
    58. 	};
    59.  
    60. 	reserved-memory {
    61. 		#address-cells = <1>;
    62. 		#size-cells = <1>;
    63. 		ranges;
    64.  
    65. 		optee@dd000000 {
    66. 			reg = <0xdd000000 0x3000000>;
    67. 			no-map;
    68. 		};
    69. 	};
    70.  
    71. 	vddcore: vddcore {
    72.         compatible = "regulator-fixed";
    73.         regulator-name = "vddcore";
    74.         regulator-min-microvolt = <1250000>;
    75.         regulator-max-microvolt = <1250000>;
    76.         regulator-off-in-suspend;
    77.         regulator-always-on;
    78. 	};
    79.  
    80. 	vddcpu: vddcpu {
    81. 		compatible = "regulator-fixed";
    82. 		regulator-name = "vddcpu";
    83. 		regulator-min-microvolt = <1350000>;
    84. 		regulator-max-microvolt = <1350000>;
    85.         regulator-off-in-suspend;
    86.         regulator-always-on;
    87. 	};
    88.  
    89. 	v3v3: v3v3 {
    90.         compatible = "regulator-fixed";
    91.         regulator-name = "v3v3";
    92.         regulator-min-microvolt = <3300000>;
    93.         regulator-max-microvolt = <3300000>;
    94.         regulator-off-in-suspend;
    95.         regulator-always-on;
    96.     };
    97.  
    98. 	vbus_otg: vbus_otg {
    99.         compatible = "regulator-fixed";
    100.         regulator-name = "vbus_otg";
    101.         regulator-min-microvolt = <5000000>;
    102.         regulator-max-microvolt = <5000000>;
    103.         regulator-off-in-suspend;
    104. 		regulator-always-on;
    105.     };
    106.  
    107. 	vdd: vdd {
    108.         compatible = "regulator-fixed";
    109.         regulator-name = "vdd";
    110.         regulator-min-microvolt = <3300000>;
    111.         regulator-max-microvolt = <3300000>;
    112.         regulator-off-in-suspend;
    113.         regulator-always-on;
    114.     };
    115.  
    116. 	vdd_usb: vdd_usb {
    117.         compatible = "regulator-fixed";
    118.         regulator-name = "vdd_usb";
    119.         regulator-min-microvolt = <3300000>;
    120.         regulator-max-microvolt = <3300000>;
    121.         regulator-off-in-suspend;
    122.         regulator-always-on;
    123.     };
    124.  
    125. 	v1v8_audio: regulator-v1v8_audio {
    126.  		compatible = "regulator-fixed";
    127.  		regulator-name = "v1v8_audio";
    128.  		regulator-min-microvolt = <1800000>;
    129.  		regulator-max-microvolt = <1800000>;
    130.  		regulator-always-on;
    131.  		regulator-boot-on;
    132. 	};
    133.  
    134.     v3v3_hdmi: regulator-v3v3-hdmi {
    135.         compatible = "regulator-fixed";
    136.         regulator-name = "v3v3_hdmi";
    137.         regulator-min-microvolt = <3300000>;
    138.         regulator-max-microvolt = <3300000>;
    139.         regulator-always-on;
    140.         regulator-boot-on;
    141.     };
    142.  
    143.     v1v2_hdmi: regulator-v1v2-hdmi {
    144.         compatible = "regulator-fixed";
    145.         regulator-name = "v1v2_hdmi";
    146.         regulator-min-microvolt = <1200000>;
    147.         regulator-max-microvolt = <1200000>;
    148.         regulator-always-on;
    149.         regulator-boot-on;
    150.     };
    151. };
    152.  
    153. &iwdg2 {
    154. 	timeout-sec = <32>;
    155. 	status = "okay";
    156. };
    157.  
    158. &arm_wdt {
    159. 	timeout-sec = <32>;
    160. 	status = "okay";
    161. };
    162.  
    163. &crc1 {
    164. 	status = "okay";
    165. };
    166.  
    167. &cryp {
    168. 	status = "okay";
    169. };
    170.  
    171. &dts {
    172. 	status = "okay";
    173. };
    174.  
    175. ð1 {
    176. 	status = "okay";
    177. 	pinctrl-0 = <ð1_rgmii_pins_a>;
    178. 	pinctrl-1 = <ð1_rgmii_sleep_pins_a>;
    179. 	pinctrl-names = "default", "sleep";
    180. 	phy-mode = "rgmii-id";
    181. 	max-speed = <1000>;
    182. 	phy-handle = <&phy0_eth1>;
    183. 	nvmem-cells = <ðernet_mac1_address>;
    184. 	nvmem-cell-names = "mac-address";
    185.  
    186. 	mdio1 {
    187. 		#address-cells = <1>;
    188. 		#size-cells = <0>;
    189. 		compatible = "snps,dwmac-mdio";
    190. 		phy0_eth1: ethernet-phy@1 {
    191.             reg = <1>;
    192. 		};
    193. 	};
    194. };
    195.  
    196. ð2 {
    197. 	status = "okay";
    198. 	pinctrl-0 = <ð2_rgmii_pins_a>;
    199. 	pinctrl-1 = <ð2_rgmii_sleep_pins_a>;
    200. 	pinctrl-names = "default", "sleep";
    201. 	phy-mode = "rgmii-id";
    202. 	max-speed = <1000>;
    203. 	phy-handle = <&phy0_eth2>;
    204. 	phy-supply = <&v3v3>;
    205. 	nvmem-cells = <ðernet_mac2_address>;
    206. 	nvmem-cell-names = "mac-address";
    207.  
    208. 	mdio1 {
    209. 		#address-cells = <1>;
    210. 		#size-cells = <0>;
    211. 		compatible = "snps,dwmac-mdio";
    212. 		phy0_eth2: ethernet-phy@2 {
    213.             reg = <2>;
    214. 		};
    215. 	};
    216. };
    217.  
    218.  
    219.  
    220. &sdmmc1 {
    221. 	pinctrl-names = "default", "opendrain", "sleep";
    222. 	pinctrl-0 = <&sdmmc1_b4_pins_a &sdmmc1_clk_pins_a>;
    223. 	pinctrl-1 = <&sdmmc1_b4_od_pins_a &sdmmc1_clk_pins_a>;
    224. 	pinctrl-2 = <&sdmmc1_b4_sleep_pins_a>;
    225. 	cd-gpios = <&gpiof 15 (GPIO_ACTIVE_LOW | GPIO_PULL_UP)>;
    226. 	st,neg-edge;
    227.  	no-1-8-v;
    228. 	bus-width = <4>;
    229. 	vmmc-supply = <&v3v3>;
    230. 	#address-cells = <1>;
    231. 	#size-cells = <0>;
    232. 	status = "okay";
    233. };
    234.  
    235. /* EMMC */
    236. &sdmmc2 {
    237. 	pinctrl-names = "default", "opendrain", "sleep";
    238. 	pinctrl-0 = <&sdmmc2_b4_pins_a &sdmmc2_b4_b7_pins_a &sdmmc2_clk_pins_a>;
    239. 	pinctrl-1 = <&sdmmc2_b4_od_pins_a &sdmmc2_b4_b7_od_pins_a &sdmmc2_clk_pins_a>;
    240. 	pinctrl-2 = <&sdmmc2_b4_sleep_pins_a &sdmmc2_b4_b7_sleep_pins_a>;
    241. 	non-removable;
    242. 	st,neg-edge;
    243.  	mmc-ddr-3_3v;
    244.  	no-1-8-v;
    245. 	bus-width = <8>;
    246. 	vmmc-supply = <&v3v3>;
    247. 	keep-power-in-suspend;
    248. 	#address-cells = <1>;
    249. 	#size-cells = <0>;
    250. 	status = "okay";
    251. };
    252.  
    253. &uart4 {
    254. 	pinctrl-names = "default", "sleep", "idle";
    255. 	pinctrl-0 = <&uart4_pins_a>;
    256. 	pinctrl-1 = <&uart4_sleep_pins_a>;
    257. 	pinctrl-2 = <&uart4_idle_pins_a>;
    258. 	/delete-property/dmas;
    259. 	/delete-property/dma-names;
    260. 	status = "okay";
    261. };
    262.  
    263.  
    264.

    3.8 修改引脚

            由于前面删了很多无关外设，引脚我们只需要复制原子的部分即可：eth1、eth2、emmc1、emmc2

    1. // SPDX-License-Identifier: (GPL-2.0+ OR BSD-3-Clause)
    2. /*
    3.  * Copyright (C) STMicroelectronics 2021 - All Rights Reserved
    4.  * Author: Alexandre Torgue 
    5.  */
    6. #include 
    7.  
    8. &pinctrl {
    9. 	eth1_rgmii_pins_a: eth1-rgmii-1 {
    10.         pins1 {
    11.             pinmux = <STM32_PINMUX('F', 12, AF11)>, /* ETH1_RGMII_CLK125 */
    12.                  <STM32_PINMUX('C', 1, AF11)>, 	/* ETH1_RGMII_GTX_CLK */
    13.                  <STM32_PINMUX('G', 13, AF11)>, /* ETH1_RGMII_TXD0 */
    14.                  <STM32_PINMUX('G', 14, AF11)>, /* ETH1_RGMII_TXD1 */
    15.                  <STM32_PINMUX('C', 2, AF11)>, 	/* ETH1_RGMII_TXD2 */
    16.                  <STM32_PINMUX('E', 5, AF10)>, 	/* ETH1_RGMII_TXD3 */
    17.                  <STM32_PINMUX('B', 11, AF11)>, /* ETH1_RGMII_TX_CTL */
    18.                  <STM32_PINMUX('A', 2, AF11)>, 	/* ETH1_MDIO */
    19.                  <STM32_PINMUX('G', 2, AF11)>; 	/* ETH1_MDC */
    20.             bias-disable;
    21.             drive-push-pull;
    22. 			slew-rate = <2>;
    23.         };
    24.         pins2 {
    25.             pinmux = <STM32_PINMUX('C', 4, AF11)>, /* ETH1_RGMII_RXD0 */
    26.                  <STM32_PINMUX('C', 5, AF11)>, /* ETH1_RGMII_RXD1 */
    27.                  <STM32_PINMUX('B', 0, AF11)>, /* ETH1_RGMII_RXD2 */
    28.                  <STM32_PINMUX('B', 1, AF11)>, /* ETH1_RGMII_RXD3 */
    29.                  <STM32_PINMUX('A', 1, AF11)>, /* ETH1_RGMII_RX_CLK */
    30.                  <STM32_PINMUX('A', 7, AF11)>; /* ETH1_RGMII_RX_CTL */
    31.             bias-disable;
    32.         };
    33.     };
    34.  
    35. 	eth1_rgmii_sleep_pins_a: eth1-rgmii-sleep-1 {
    36. 		pins1 {
    37.             pinmux = <STM32_PINMUX('F', 12, ANALOG)>, /* ETH1_RGMII_CLK125 */
    38.                  <STM32_PINMUX('C', 1, ANALOG)>, 	/* ETH1_RGMII_GTX_CLK */
    39.                  <STM32_PINMUX('G', 13, ANALOG)>, 	/* ETH1_RGMII_TXD0 */
    40.                  <STM32_PINMUX('G', 14, ANALOG)>, 	/* ETH1_RGMII_TXD1 */
    41.                  <STM32_PINMUX('C', 2, ANALOG)>, 	/* ETH1_RGMII_TXD2 */
    42.                  <STM32_PINMUX('E', 5, ANALOG)>, 	/* ETH1_RGMII_TXD3 */
    43.                  <STM32_PINMUX('B', 11, ANALOG)>, 	/* ETH1_RGMII_TX_CTL */
    44.                  <STM32_PINMUX('A', 2, ANALOG)>, 	/* ETH1_MDIO */
    45.                  <STM32_PINMUX('G', 2, ANALOG)>, 	/* ETH1_MDC */
    46. 				 <STM32_PINMUX('C', 4, ANALOG)>, 	/* ETH1_RGMII_RXD0 */
    47.                  <STM32_PINMUX('C', 5, ANALOG)>, 	/* ETH1_RGMII_RXD1 */
    48.                  <STM32_PINMUX('B', 0, ANALOG)>, 	/* ETH1_RGMII_RXD2 */
    49.                  <STM32_PINMUX('B', 1, ANALOG)>, 	/* ETH1_RGMII_RXD3 */
    50.                  <STM32_PINMUX('A', 1, ANALOG)>, 	/* ETH1_RGMII_RX_CLK */
    51.                  <STM32_PINMUX('A', 7, ANALOG)>; 	/* ETH1_RGMII_RX_CTL */
    52. 		};
    53. 	};
    54.  
    55. 	eth2_rgmii_pins_a: eth2-rgmii-2 {
    56. 		pins1 {
    57. 			pinmux = <STM32_PINMUX('H', 2, AF13)>, /* ETH2_RGMII_CLK125 */
    58. 				 <STM32_PINMUX('F', 7, AF11)>, 	/* ETH2_RGMII_TXD0 */
    59. 				 <STM32_PINMUX('G', 11, AF10)>, /* ETH2_RGMII_TXD1 */
    60. 				 <STM32_PINMUX('G', 1, AF10)>, 	/* ETH2_RGMII_TXD2 */
    61. 				 <STM32_PINMUX('E', 6, AF11)>, 	/* ETH2_RGMII_TXD3 */
    62. 				 <STM32_PINMUX('G', 3, AF10)>, 	/* ETH2_RGMII_GTX_CLK */
    63. 				 <STM32_PINMUX('F', 6, AF11)>, 	/* ETH2_RGMII_TX_CTL */
    64. 				 <STM32_PINMUX('B', 2, AF11)>, 	/* ETH2_MDIO */
    65. 				 <STM32_PINMUX('G', 5, AF10)>; 	/* ETH2_MDC */
    66. 			bias-disable;
    67. 			drive-push-pull;
    68. 			slew-rate = <2>;
    69. 		};
    70.  
    71. 		pins2 {
    72. 			pinmux = <STM32_PINMUX('F', 4, AF11)>, /* ETH2_RGMII_RXD0 */
    73. 				 <STM32_PINMUX('E', 2, AF10)>, 	/* ETH2_RGMII_RXD1 */
    74. 				 <STM32_PINMUX('H', 6, AF12)>, 	/* ETH2_RGMII_RXD2 */
    75. 				 <STM32_PINMUX('A', 8, AF11)>, 	/* ETH2_RGMII_RXD3 */
    76. 				 <STM32_PINMUX('H', 11, AF11)>, /* ETH2_RGMII_RX_CLK */
    77. 				 <STM32_PINMUX('G', 12, AF12)>; /* ETH2_RGMII_RX_CTL */
    78. 			bias-disable;
    79. 		};
    80. 	};
    81.  
    82. 	eth2_rgmii_sleep_pins_a: eth2-rgmii-sleep-2 {
    83. 		pins1 {
    84. 			pinmux = <STM32_PINMUX('H', 2, ANALOG)>, /* ETH2_RGMII_CLK125 */
    85. 				 <STM32_PINMUX('F', 7, ANALOG)>, 	/* ETH2_RGMII_TXD0 */
    86. 				 <STM32_PINMUX('G', 11, ANALOG)>, 	/* ETH2_RGMII_TXD1 */
    87. 				 <STM32_PINMUX('G', 1, ANALOG)>, 	/* ETH2_RGMII_TXD2 */
    88. 				 <STM32_PINMUX('E', 6, ANALOG)>, 	/* ETH2_RGMII_TXD3 */
    89. 				 <STM32_PINMUX('G', 3, ANALOG)>, 	/* ETH2_RGMII_GTX_CLK */
    90. 				 <STM32_PINMUX('F', 6, ANALOG)>, 	/* ETH2_RGMII_TX_CTL */
    91. 				 <STM32_PINMUX('B', 2, ANALOG)>, 	/* ETH2_MDIO */
    92. 				 <STM32_PINMUX('G', 5, ANALOG)>, 	/* ETH2_MDC */
    93. 				 <STM32_PINMUX('F', 4, ANALOG)>, 	/* ETH2_RGMII_RXD0 */
    94. 				 <STM32_PINMUX('E', 2, ANALOG)>, 	/* ETH2_RGMII_RXD1 */
    95. 				 <STM32_PINMUX('H', 6, ANALOG)>, 	/* ETH2_RGMII_RXD2 */
    96. 				 <STM32_PINMUX('A', 8, ANALOG)>, 	/* ETH2_RGMII_RXD3 */
    97. 				 <STM32_PINMUX('H', 11, ANALOG)>, 	/* ETH2_RGMII_RX_CLK */
    98. 				 <STM32_PINMUX('G', 12, ANALOG)>; 	/* ETH2_RGMII_RX_CTL */
    99. 		};
    100. 	};
    101.  
    102. 	sdmmc1_b4_pins_a: sdmmc1-b4-0 {
    103. 		pins {
    104. 			pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
    105. 				 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
    106. 				 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
    107. 				 <STM32_PINMUX('C', 11, AF12)>, /* SDMMC1_D3 */
    108. 				 <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
    109. 			slew-rate = <1>;
    110. 			drive-push-pull;
    111. 			bias-disable;
    112. 		};
    113. 	};
    114.  
    115. 	sdmmc1_b4_od_pins_a: sdmmc1-b4-od-0 {
    116. 		pins1 {
    117. 			pinmux = <STM32_PINMUX('C', 8, AF12)>, /* SDMMC1_D0 */
    118. 				 <STM32_PINMUX('C', 9, AF12)>, /* SDMMC1_D1 */
    119. 				 <STM32_PINMUX('C', 10, AF12)>, /* SDMMC1_D2 */
    120. 				 <STM32_PINMUX('C', 11, AF12)>; /* SDMMC1_D3 */
    121. 			slew-rate = <1>;
    122. 			drive-push-pull;
    123. 			bias-disable;
    124. 		};
    125. 		pins2 {
    126. 			pinmux = <STM32_PINMUX('D', 2, AF12)>; /* SDMMC1_CMD */
    127. 			slew-rate = <1>;
    128. 			drive-open-drain;
    129. 			bias-disable;
    130. 		};
    131. 	};
    132.  
    133. 	sdmmc1_b4_sleep_pins_a: sdmmc1-b4-sleep-0 {
    134. 		pins {
    135. 			pinmux = <STM32_PINMUX('C', 8, ANALOG)>, /* SDMMC1_D0 */
    136. 				 <STM32_PINMUX('C', 9, ANALOG)>, /* SDMMC1_D1 */
    137. 				 <STM32_PINMUX('C', 10, ANALOG)>, /* SDMMC1_D2 */
    138. 				 <STM32_PINMUX('C', 11, ANALOG)>, /* SDMMC1_D3 */
    139. 				 <STM32_PINMUX('C', 12, ANALOG)>, /* SDMMC1_CK */
    140. 				 <STM32_PINMUX('D', 2, ANALOG)>; /* SDMMC1_CMD */
    141. 		};
    142. 	};
    143.  
    144. 	sdmmc1_clk_pins_a: sdmmc1-clk-0 {
    145. 		pins {
    146. 			pinmux = <STM32_PINMUX('C', 12, AF12)>; /* SDMMC1_CK */
    147. 			slew-rate = <1>;
    148. 			drive-push-pull;
    149. 			bias-disable;
    150. 		};
    151. 	};
    152.  
    153. 	sdmmc2_b4_pins_a: sdmmc2-b4-0 {
    154. 		pins {
    155. 			pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
    156. 				 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
    157. 				 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
    158. 				 <STM32_PINMUX('B', 4, AF10)>, /* SDMMC2_D3 */
    159. 				 <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
    160. 			slew-rate = <1>;
    161. 			drive-push-pull;
    162. 			bias-pull-up;
    163. 		};
    164. 	};
    165.  
    166. 	sdmmc2_b4_b7_pins_a: sdmmc2-b4-b7-0 {
    167. 		pins {
    168. 			pinmux = <STM32_PINMUX('F', 0, AF10)>, /* SDMMC2_D4 */
    169. 				 <STM32_PINMUX('B', 9, AF10)>, /* SDMMC2_D5 */
    170. 				 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */				 
    171. 				 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
    172. 			slew-rate = <1>;
    173. 			drive-push-pull;
    174. 			bias-pull-up;
    175. 		};
    176. 	};
    177.  
    178. 	sdmmc2_b4_od_pins_a: sdmmc2-b4-od-0 {
    179. 		pins1 {
    180. 			pinmux = <STM32_PINMUX('B', 14, AF10)>, /* SDMMC2_D0 */
    181. 				 <STM32_PINMUX('B', 15, AF10)>, /* SDMMC2_D1 */
    182. 				 <STM32_PINMUX('B', 3, AF10)>, /* SDMMC2_D2 */
    183. 				 <STM32_PINMUX('B', 4, AF10)>; /* SDMMC2_D3 */
    184. 			slew-rate = <1>;
    185. 			drive-push-pull;
    186. 			bias-pull-up;
    187. 		};
    188. 		pins2 {
    189. 			pinmux = <STM32_PINMUX('G', 6, AF10)>; /* SDMMC2_CMD */
    190. 			slew-rate = <1>;
    191. 			drive-open-drain;
    192. 			bias-pull-up;
    193. 		};
    194. 	};
    195.  
    196. 	sdmmc2_b4_b7_od_pins_a: sdmmc2-b4-b7-od-0 {
    197. 		pins {
    198. 			pinmux = <STM32_PINMUX('F', 0, AF10)>, /* SDMMC2_D4 */
    199. 				 <STM32_PINMUX('B', 9, AF10)>, /* SDMMC2_D5 */
    200. 				 <STM32_PINMUX('C', 6, AF10)>, /* SDMMC2_D6 */				 
    201. 				 <STM32_PINMUX('C', 7, AF10)>; /* SDMMC2_D7 */
    202. 			slew-rate = <1>;
    203. 			drive-push-pull;
    204. 			bias-pull-up;
    205. 		};
    206. 	};	
    207.  
    208. 	sdmmc2_b4_sleep_pins_a: sdmmc2-b4-sleep-0 {
    209. 		pins {
    210. 			pinmux = <STM32_PINMUX('B', 14, ANALOG)>, /* SDMMC2_D0 */
    211. 				 <STM32_PINMUX('B', 15, ANALOG)>, /* SDMMC2_D1 */
    212. 				 <STM32_PINMUX('B', 3, ANALOG)>, /* SDMMC2_D2 */
    213. 				 <STM32_PINMUX('B', 4, ANALOG)>, /* SDMMC2_D3 */
    214. 				 <STM32_PINMUX('E', 3, ANALOG)>, /* SDMMC2_CK */
    215. 				 <STM32_PINMUX('G', 6, ANALOG)>; /* SDMMC2_CMD */
    216. 		};
    217. 	};
    218.  
    219. 	sdmmc2_b4_b7_sleep_pins_a: sdmmc2-b4-b7-sleep-0 {
    220. 		pins {
    221. 			pinmux = <STM32_PINMUX('F', 0, ANALOG)>, /* SDMMC2_D4 */
    222. 				 <STM32_PINMUX('B', 9, ANALOG)>, /* SDMMC2_D5 */
    223. 				 <STM32_PINMUX('C', 6, ANALOG)>, /* SDMMC2_D6 */				 
    224. 				 <STM32_PINMUX('C', 7, ANALOG)>; /* SDMMC2_D7 */
    225. 		};
    226. 	};
    227.  
    228. 	sdmmc2_clk_pins_a: sdmmc2-clk-0 {
    229. 		pins {
    230. 			pinmux = <STM32_PINMUX('E', 3, AF10)>; /* SDMMC2_CK */
    231. 			slew-rate = <1>;
    232. 			drive-push-pull;
    233. 			bias-pull-up;
    234. 		};
    235. 	};
    236.  
    237. 	uart4_pins_a: uart4-0 {
    238. 		pins1 {
    239. 			pinmux = <STM32_PINMUX('D', 6, AF8)>; /* UART4_TX */
    240. 			bias-disable;
    241. 			drive-push-pull;
    242. 			slew-rate = <0>;
    243. 		};
    244. 		pins2 {
    245. 			pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
    246. 			bias-pull-up;
    247. 		};
    248. 	};
    249.  
    250. 	uart4_idle_pins_a: uart4-idle-0 {
    251. 		pins1 {
    252. 			pinmux = <STM32_PINMUX('D', 6, ANALOG)>; /* UART4_TX */
    253. 		};
    254. 		pins2 {
    255. 			pinmux = <STM32_PINMUX('D', 8, AF8)>; /* UART4_RX */
    256. 			bias-pull-up;
    257. 		};
    258. 	};
    259.  
    260. 	uart4_sleep_pins_a: uart4-sleep-0 {
    261. 		pins {
    262. 			pinmux = <STM32_PINMUX('D', 6, ANALOG)>, /* UART4_TX */
    263. 				 <STM32_PINMUX('D', 8, ANALOG)>; /* UART4_RX */
    264. 		};
    265. 	};
    266. };

    3.9 修改Makefile

            在源码目录下arch/arm/boot/dts/这个目录里有一个Makefile，找到里面的stm32

    1. dtb-$(CONFIG_ARCH_STM32) += \
    2. 	stm32f429-disco.dtb \
    3. 	stm32f469-disco.dtb \
    4. 	stm32f746-disco.dtb \
    5. 	stm32f769-disco.dtb \
    6. 	stm32429i-eval.dtb \
    7. 	stm32746g-eval.dtb \
    8. 	stm32h743i-eval.dtb \
    9. 	stm32h743i-disco.dtb \
    10. 	stm32h750i-art-pi.dtb \
    11. 	stm32mp135f-dk.dtb \
    12. 	stm32mp135f-dk-a7-examples.dtb \
    13. 	stm32mp151a-prtt1a.dtb \
    14. 	stm32mp151a-prtt1c.dtb \
    15. 	stm32mp151a-prtt1s.dtb \
    16. 	stm32mp153c-dhcom-drc02.dtb \
    17. 	stm32mp153c-dhcor-drc-compact.dtb \
    18. 	stm32mp157a-avenger96.dtb \
    19. 	stm32mp157a-dhcor-avenger96.dtb \
    20. 	stm32mp157a-dk1.dtb \
    21. 	stm32mp157a-dk1-a7-examples.dtb \
    22. 	stm32mp157a-dk1-m4-examples.dtb \
    23. 	stm32mp157a-ed1.dtb \
    24. 	stm32mp157a-ev1.dtb \
    25. 	stm32mp157a-ev1-a7-examples.dtb \
    26. 	stm32mp157a-ev1-m4-examples.dtb \
    27. 	stm32mp157a-iot-box.dtb \
    28. 	stm32mp157a-microgea-stm32mp1-microdev2.0.dtb \
    29. 	stm32mp157a-microgea-stm32mp1-microdev2.0-of7.dtb \
    30. 	stm32mp157a-icore-stm32mp1-ctouch2.dtb \
    31. 	stm32mp157a-icore-stm32mp1-ctouch2-of10.dtb \
    32. 	stm32mp157a-icore-stm32mp1-edimm2.2.dtb \
    33. 	stm32mp157a-stinger96.dtb \
    34. 	stm32mp157c-dhcom-pdk2.dtb \
    35. 	stm32mp157c-dhcom-picoitx.dtb \
    36. 	stm32mp157c-dk2.dtb \
    37. 	stm32mp157c-dk2-a7-examples.dtb \
    38. 	stm32mp157c-dk2-m4-examples.dtb \
    39. 	stm32mp157c-ed1.dtb \
    40. 	stm32mp157c-emsbc-argon.dtb \
    41. 	stm32mp157c-ev1.dtb \
    42. 	stm32mp157c-ev1-a7-examples.dtb \
    43. 	stm32mp157c-ev1-m4-examples.dtb \
    44. 	stm32mp157c-lxa-mc1.dtb \
    45. 	stm32mp157c-odyssey.dtb \
    46. 	stm32mp157d-dk1.dtb \
    47. 	stm32mp157d-dk1-a7-examples.dtb \
    48. 	stm32mp157d-dk1-m4-examples.dtb \
    49. 	stm32mp157d-ed1.dtb \
    50. 	stm32mp157d-ev1.dtb \
    51. 	stm32mp157d-ev1-a7-examples.dtb \
    52. 	stm32mp157d-ev1-m4-examples.dtb \
    53. 	stm32mp157f-dk2.dtb \
    54. 	stm32mp157f-dk2-a7-examples.dtb \
    55. 	stm32mp157f-dk2-m4-examples.dtb \
    56. 	stm32mp157f-ed1.dtb \
    57. 	stm32mp157f-ev1.dtb \
    58. 	stm32mp157f-ev1-a7-examples.dtb \
    59. 	stm32mp157f-ev1-m4-examples.dtb \

            添加上我们的设备树，或者全删了只留我们自己的设备树

    1. dtb-$(CONFIG_ARCH_STM32) += \
    2. 	stm32mp135-atk.dtb

    至此，内核所需要修改的文件已全部完成。

    四、编译

    4.1 配置内核

            在这里笔者遇到一个问题，内核编译后直接跑，会提示无法修改CPU主频，然后上网找到了需要配置内核：

    1. /* 打开Linux图形化配置界面 */
    2. make ARCH=arm O="${OUTPUT_BUILD_DIR}" menuconfig

    ->CPU Power Management

            ->CPU Frequency scaling

                    ->[*]        CPU frequency transition statistics

                            ->        Default CPUFreq governor(userspace)

             把CPUFreq改为userspace这个选项

    cp ../build/.config arch/arm/configs/stm32mp135_atk_defconfig

            把配置文件保存为我们的默认配置文件，以便下次使用

    4.2 编译

    1. /* 编译内核、设备树 */
    2. make ARCH=arm uImage vmlinux dtbs LOADADDR=0xC2000040 O="${OUTPUT_BUILD_DIR}"
    3.  
    4. /* 复制文件到输出文件夹 */
    5. cp ${OUTPUT_BUILD_DIR}/arch/arm/boot/uImage ${OUTPUT_BUILD_DIR}/install_artifact/boot/
    6. cp ${OUTPUT_BUILD_DIR}/arch/arm/boot/dts/st*.dtb ${OUTPUT_BUILD_DIR}/install_artifact/boot/

            这时候查看build/install_artifact/boot文件夹，会发现有刚刚编译好的uImage和stm32mp135-atk.dtb，剩下的烧写就就可以根据原子的详细教程就行了

    4.3 nfs挂载根文件系统

            这里可能有个小小的坑，在设备树中，ethernet0是eth1，ethernet1是eth2，所以用nfs挂根文件系统的时候，应该选eth0或eth1。反正大家可以多尝试几个。

            笔者用tftp和nfs启动内核：

    1. setenv bootcmd 'tftp c2000000 uImage;tftp c4000000 stm32mp135-atk.dtb;bootm c2000000 - c4000000'
    2. setenv bootargs 'console=ttySTM0,115200 root=/dev/nfs nfsroot=192.168.1.2:/home/zhangrl/Linux/nfs/rootfs,proto=tcp rw ip=192.168.1.3:192.168.1.2:192.168.1.1:255.255.255.0::eth1:off'

    4.4 emmc挂根文件系统

            烧写到emmc中的时候，先去uboot里查看自己的内核在emmc的哪一个分区，rootfs在哪一个分区：

            使用ext4ls命令，对一个一个分区进行扫描，直到看到自己的分区（笔者只会这个笨方法）

            ext4ls:

            第一个参数mmc，设备，选择mmc设备

            第二个参数1，选择mmc1，就是我们的emmc

            第三个参数，选择分区，一个一个试

            知道自己的分区之后，就可以该bootcmd和bootargs:

    1. setenv bootcmd  'ext4load mmc 1:6 c2000000 uImage;ext4load mmc 1:6 c4000000 stm32mp135-atk.dtb;bootm c2000000 - c4000000'
    2. setenv bootargs 'console=ttySTM0,115200 root=/dev/mmcblk1p7 rootwait rw'

            至此，STM32MP135的全套移植教程完成，补上了正点原子的空白，剩下的根文件系统直接跟正点原子的教程即可，使用buildroot和busybox都可以。笔者今年刚学Linux，从i.mx6ull学完过来，对Linux的理解可能并不到位

            如果文章有错误，希望大家指正

  • 相关阅读:
    2023年重水(氧化氘)市场规模：现状及未来发展趋
    算法基础学习笔记——⑦位运算
    字符串匹配DP问题合集
    Create a new window with NSWindow
    Ubuntu 20.04中docker-compose部署Nightingale
    【干货分享】.NET人脸识别解决方案
    【原创教程】埃斯顿机器人：弯管机推力解决方式（上）
    如何判断一款软件的安全性？
    laravel中 指定字段 指定数值排序
    Mockito单元测试说明
  • 原文地址：https://blog.csdn.net/qq_42697289/article/details/133577351