• xf86-video-intel源码分析6 —— intel_device.c和intel_driver.h（1）

    intel_driver.h

    intel_driver.h位于src目录下，内容为：

    1. #ifndef INTEL_DRIVER_H
    2. #define INTEL_DRIVER_H
    3.  
    4. struct xf86_platform_device;
    5.  
    6. #define INTEL_VERSION 4000
    7. #define INTEL_NAME "intel"
    8. #define INTEL_DRIVER_NAME "intel"
    9.  
    10. #define INTEL_VERSION_MAJOR PACKAGE_VERSION_MAJOR
    11. #define INTEL_VERSION_MINOR PACKAGE_VERSION_MINOR
    12. #define INTEL_VERSION_PATCH PACKAGE_VERSION_PATCHLEVEL
    13.  
    14. #define PCI_CHIP_I810		0x7121
    15. #define PCI_CHIP_I810_DC100	0x7123
    16. #define PCI_CHIP_I810_E		0x7125
    17. #define PCI_CHIP_I815		0x1132
    18.  
    19. #define PCI_CHIP_I830_M		0x3577
    20. #define PCI_CHIP_845_G		0x2562
    21. #define PCI_CHIP_I854		0x358E
    22. #define PCI_CHIP_I855_GM	0x3582
    23. #define PCI_CHIP_I865_G		0x2572
    24.  
    25. #define PCI_CHIP_I915_G		0x2582
    26. #define PCI_CHIP_I915_GM	0x2592
    27. #define PCI_CHIP_E7221_G	0x258A
    28. #define PCI_CHIP_I945_G		0x2772
    29. #define PCI_CHIP_I945_GM        0x27A2
    30. #define PCI_CHIP_I945_GME	0x27AE
    31. #define PCI_CHIP_PINEVIEW_M	0xA011
    32. #define PCI_CHIP_PINEVIEW_G	0xA001
    33. #define PCI_CHIP_Q35_G		0x29B2
    34. #define PCI_CHIP_G33_G		0x29C2
    35. #define PCI_CHIP_Q33_G		0x29D2
    36.  
    37. #define PCI_CHIP_G35_G		0x2982
    38. #define PCI_CHIP_I965_Q		0x2992
    39. #define PCI_CHIP_I965_G		0x29A2
    40. #define PCI_CHIP_I946_GZ	0x2972
    41. #define PCI_CHIP_I965_GM        0x2A02
    42. #define PCI_CHIP_I965_GME       0x2A12
    43. #define PCI_CHIP_GM45_GM	0x2A42
    44. #define PCI_CHIP_G45_E_G	0x2E02
    45. #define PCI_CHIP_G45_G		0x2E22
    46. #define PCI_CHIP_Q45_G		0x2E12
    47. #define PCI_CHIP_G41_G		0x2E32
    48. #define PCI_CHIP_B43_G		0x2E42
    49. #define PCI_CHIP_B43_G1		0x2E92
    50.  
    51. #define PCI_CHIP_IRONLAKE_D_G		0x0042
    52. #define PCI_CHIP_IRONLAKE_M_G		0x0046
    53.  
    54. #define PCI_CHIP_SANDYBRIDGE_GT1	0x0102
    55. #define PCI_CHIP_SANDYBRIDGE_GT2	0x0112
    56. #define PCI_CHIP_SANDYBRIDGE_GT2_PLUS	0x0122
    57. #define PCI_CHIP_SANDYBRIDGE_M_GT1	0x0106
    58. #define PCI_CHIP_SANDYBRIDGE_M_GT2	0x0116
    59. #define PCI_CHIP_SANDYBRIDGE_M_GT2_PLUS	0x0126
    60. #define PCI_CHIP_SANDYBRIDGE_S_GT	0x010A
    61.  
    62. #define PCI_CHIP_IVYBRIDGE_M_GT1	0x0156
    63. #define PCI_CHIP_IVYBRIDGE_M_GT2	0x0166
    64. #define PCI_CHIP_IVYBRIDGE_D_GT1	0x0152
    65. #define PCI_CHIP_IVYBRIDGE_D_GT2	0x0162
    66. #define PCI_CHIP_IVYBRIDGE_S_GT1	0x015a
    67. #define PCI_CHIP_IVYBRIDGE_S_GT2	0x016a
    68.  
    69. #define PCI_CHIP_HASWELL_D_GT1		0x0402
    70. #define PCI_CHIP_HASWELL_D_GT2		0x0412
    71. #define PCI_CHIP_HASWELL_D_GT3		0x0422
    72. #define PCI_CHIP_HASWELL_M_GT1		0x0406
    73. #define PCI_CHIP_HASWELL_M_GT2		0x0416
    74. #define PCI_CHIP_HASWELL_M_GT3		0x0426
    75. #define PCI_CHIP_HASWELL_S_GT1		0x040A
    76. #define PCI_CHIP_HASWELL_S_GT2		0x041A
    77. #define PCI_CHIP_HASWELL_S_GT3		0x042A
    78. #define PCI_CHIP_HASWELL_B_GT1		0x040B
    79. #define PCI_CHIP_HASWELL_B_GT2		0x041B
    80. #define PCI_CHIP_HASWELL_B_GT3		0x042B
    81. #define PCI_CHIP_HASWELL_E_GT1		0x040E
    82. #define PCI_CHIP_HASWELL_E_GT2		0x041E
    83. #define PCI_CHIP_HASWELL_E_GT3		0x042E
    84.  
    85. #define PCI_CHIP_HASWELL_ULT_D_GT1	0x0A02
    86. #define PCI_CHIP_HASWELL_ULT_D_GT2	0x0A12
    87. #define PCI_CHIP_HASWELL_ULT_D_GT3	0x0A22
    88. #define PCI_CHIP_HASWELL_ULT_M_GT1	0x0A06
    89. #define PCI_CHIP_HASWELL_ULT_M_GT2	0x0A16
    90. #define PCI_CHIP_HASWELL_ULT_M_GT3	0x0A26
    91. #define PCI_CHIP_HASWELL_ULT_S_GT1	0x0A0A
    92. #define PCI_CHIP_HASWELL_ULT_S_GT2	0x0A1A
    93. #define PCI_CHIP_HASWELL_ULT_S_GT3	0x0A2A
    94. #define PCI_CHIP_HASWELL_ULT_B_GT1	0x0A0B
    95. #define PCI_CHIP_HASWELL_ULT_B_GT2	0x0A1B
    96. #define PCI_CHIP_HASWELL_ULT_B_GT3	0x0A2B
    97. #define PCI_CHIP_HASWELL_ULT_E_GT1	0x0A0E
    98. #define PCI_CHIP_HASWELL_ULT_E_GT2	0x0A1E
    99. #define PCI_CHIP_HASWELL_ULT_E_GT3	0x0A2E
    100.  
    101. #define PCI_CHIP_HASWELL_CRW_D_GT1	0x0D02
    102. #define PCI_CHIP_HASWELL_CRW_D_GT2	0x0D12
    103. #define PCI_CHIP_HASWELL_CRW_D_GT3	0x0D22
    104. #define PCI_CHIP_HASWELL_CRW_M_GT1	0x0D06
    105. #define PCI_CHIP_HASWELL_CRW_M_GT2	0x0D16
    106. #define PCI_CHIP_HASWELL_CRW_M_GT3	0x0D26
    107. #define PCI_CHIP_HASWELL_CRW_S_GT1	0x0D0A
    108. #define PCI_CHIP_HASWELL_CRW_S_GT2	0x0D1A
    109. #define PCI_CHIP_HASWELL_CRW_S_GT3	0x0D2A
    110. #define PCI_CHIP_HASWELL_CRW_B_GT1	0x0D0B
    111. #define PCI_CHIP_HASWELL_CRW_B_GT2	0x0D1B
    112. #define PCI_CHIP_HASWELL_CRW_B_GT3	0x0D2B
    113. #define PCI_CHIP_HASWELL_CRW_E_GT1	0x0D0E
    114. #define PCI_CHIP_HASWELL_CRW_E_GT2	0x0D1E
    115. #define PCI_CHIP_HASWELL_CRW_E_GT3	0x0D2E
    116.  
    117. struct intel_device_info {
    118. 	int gen;
    119. };
    120. struct intel_device;
    121.  
    122. int intel_entity_get_devid(int index);
    123.  
    124. int intel_open_device(int entity_num,
    125. 		      const struct pci_device *pci,
    126. 		      struct xf86_platform_device *dev);
    127. void intel_close_device(int entity_num);
    128. int __intel_peek_fd(ScrnInfoPtr scrn);
    129. struct intel_device *intel_get_device(ScrnInfoPtr scrn, int *fd);
    130. int intel_has_render_node(struct intel_device *dev);
    131. const char *intel_get_master_name(struct intel_device *dev);
    132. const char *intel_get_client_name(struct intel_device *dev);
    133. int intel_get_client_fd(struct intel_device *dev);
    134. int intel_get_device_id(struct intel_device *dev);
    135. int intel_get_master(struct intel_device *dev);
    136. int intel_put_master(struct intel_device *dev);
    137. void intel_put_device(struct intel_device *dev);
    138.  
    139. void intel_detect_chipset(ScrnInfoPtr scrn, struct intel_device *dev);
    140.  
    141. #define IS_DEFAULT_ACCEL_METHOD(x) ({ \
    142. 	enum { NOACCEL, SNA, UXA } default_accel_method__ = DEFAULT_ACCEL_METHOD; \
    143. 	default_accel_method__ == x; \
    144. })
    145.  
    146. #define hosted() (0)
    147.  
    148. #endif /* INTEL_DRIVER_H */

    intel_driver.h中声明了intel_device.c中实现的函数，虽然名字一个叫driver、一个叫device。其中内容在下边分析inter_device.c的时候再做讲解。

    intel_device.c

    intel_device.c位于src目录下，文件内容较长（将近850行），因此在此不全部列出，而是一个函数一个函数来分析。

    • intel_open_device
    1. int intel_open_device(int entity_num,
    2. 		      const struct pci_device *pci,
    3. 		      struct xf86_platform_device *platform)
    4. {
    5. 	struct intel_device *dev;
    6. 	char *path;
    7. 	int fd, master_count;
    8.  
    9. 	if (intel_device_key == -1)
    10. 		intel_device_key = xf86AllocateEntityPrivateIndex();
    11. 	if (intel_device_key == -1)
    12. 		return -1;
    13.  
    14. 	dev = xf86GetEntityPrivate(entity_num, intel_device_key)->ptr;
    15. 	if (dev)
    16. 		return dev->fd;
    17.  
    18. 	path = get_path(platform);
    19.  
    20. 	master_count = 1; /* DRM_MASTER is managed by Xserver */
    21. 	fd = get_fd(platform);
    22. 	if (fd == -1) {
    23. 		fd = __intel_open_device(pci, path);
    24. 		if (fd == -1)
    25. 			goto err_path;
    26.  
    27. 		master_count = 0;
    28. 	}
    29.  
    30. 	if (path == NULL) {
    31. 		path = find_master_node(fd);
    32. 		if (path == NULL)
    33. 			goto err_close;
    34. 	}
    35.  
    36. 	if (!__intel_check_device(fd))
    37. 		goto err_close;
    38.  
    39. 	dev = malloc(sizeof(*dev));
    40. 	if (dev == NULL)
    41. 		goto err_close;
    42.  
    43. 	/* If hosted under a system compositor, just pretend to be master */
    44. 	if (hosted())
    45. 		master_count++;
    46.  
    47. 	/* Non-root user holding MASTER, don't let go */
    48. 	if (geteuid() && is_master(fd))
    49. 		master_count++;
    50.  
    51. 	if (pci)
    52. 		dev->device_id = pci->device_id;
    53. 	else
    54. 		dev->device_id = __intel_get_device_id(fd);
    55.  
    56. 	dev->idx = entity_num;
    57. 	dev->fd = fd;
    58. 	dev->open_count = master_count;
    59. 	dev->master_count = master_count;
    60. 	dev->master_node = path;
    61. 	dev->render_node = find_render_node(fd);
    62. 	if (dev->render_node == NULL)
    63. 		dev->render_node = dev->master_node;
    64.  
    65. 	xf86GetEntityPrivate(entity_num, intel_device_key)->ptr = dev;
    66.  
    67. 	return fd;
    68.  
    69. err_close:
    70. 	if (master_count == 0) /* Don't close server-fds */
    71. 		close(fd);
    72. err_path:
    73. 	free(path);
    74. 	return -1;
    75. }

    这个函数本身也不短，分块来分析。先看第1段：

    1.     if (intel_device_key == -1)
    2. 		intel_device_key = xf86AllocateEntityPrivateIndex();
    3. 	if (intel_device_key == -1)
    4. 		return -1;

    intel_device_key在同文件中定义，为静态全局变量：

    static int intel_device_key = -1;

    初始时intel_device_key的值为-1，必定会调用xf86AllocateEntityPrivateIndex()。xf86AllocateEntityPrivateIndex函数在xorg-server源码的hw/xfree86/common/xf86Bus.c中，代码如下：

    1. /*
    2.  * Allocate a private in the entities.
    3.  */
    4.  
    5. int
    6. xf86AllocateEntityPrivateIndex(void)
    7. {
    8.     int idx, i;
    9.     EntityPtr pEnt;
    10.     DevUnion *nprivs;
    11.  
    12.     idx = xf86EntityPrivateCount++;
    13.     for (i = 0; i < xf86NumEntities; i++) {
    14.         pEnt = xf86Entities[i];
    15.         nprivs = xnfreallocarray(pEnt->entityPrivates,
    16.                                  xf86EntityPrivateCount, sizeof(DevUnion));
    17.         /* Zero the new private */
    18.         memset(&nprivs[idx], 0, sizeof(DevUnion));
    19.         pEnt->entityPrivates = nprivs;
    20.     }
    21.     return idx;
    22. }

    再来看第2段：

    1.     dev = xf86GetEntityPrivate(entity_num, intel_device_key)->ptr;
    2. 	if (dev)
    3. 		return dev->fd;

    xf86GetEntityPrivate函数同在xorg-server源码的hw/xfree86/common/xf86Bus.c中，就在xf86AllocateEntityPrivateIndex函数实现的下边，代码如下：

    1. DevUnion *
    2. xf86GetEntityPrivate(int entityIndex, int privIndex)
    3. {
    4.     if (entityIndex >= xf86NumEntities || privIndex >= xf86EntityPrivateCount)
    5.         return NULL;
    6.  
    7.     return &(xf86Entities[entityIndex]->entityPrivates[privIndex]);
    8. }

    接下来看第3段：

    path = get_path(platform);

    path是函数内部定义的局部变量：char *path;。

    这段代码的意思是根据intel_open_device函数的入参struct xf86_platform_device *platform即平台设备指针获得相应的路径。

    get_path函数在同文件中实现，代码如下：

    1. #if defined(ODEV_ATTRIB_PATH)
    2. static char *get_path(struct xf86_platform_device *dev)
    3. {
    4. 	const char *path;
    5.  
    6. 	if (dev == NULL)
    7. 		return NULL;
    8.  
    9. 	path = xf86_get_platform_device_attrib(dev, ODEV_ATTRIB_PATH);
    10. 	if (path == NULL)
    11. 		return NULL;
    12.  
    13. 	return strdup(path);
    14. }
    15.  
    16. #else
    17.  
    18. static char *get_path(struct xf86_platform_device *dev)
    19. {
    20. 	return NULL;
    21. }
    22. #endif

    接下来看第4段：

    1.     master_count = 1; /* DRM_MASTER is managed by Xserver */
    2. 	fd = get_fd(platform);
    3. 	if (fd == -1) {
    4. 		fd = __intel_open_device(pci, path);
    5. 		if (fd == -1)
    6. 			goto err_path;
    7.  
    8. 		master_count = 0;
    9. 	}

    这段代码的意思是根据intel_open_device函数的入参struct xf86_platform_device *platform即平台设备指针获得相应的文件描述符。如果获取不到，则调用__intel_open_device函数根据intel_open_device函数的入参pci打开设备。

    get_path函数在同文件中实现，代码如下：

    1. #if defined(ODEV_ATTRIB_FD)
    2. static int get_fd(struct xf86_platform_device *dev)
    3. {
    4. 	if (dev == NULL)
    5. 		return -1;
    6.  
    7. 	return xf86_get_platform_device_int_attrib(dev, ODEV_ATTRIB_FD, -1);
    8. }
    9.  
    10. #else
    11.  
    12. static int get_fd(struct xf86_platform_device *dev)
    13. {
    14. 	return -1;
    15. }
    16. #endif

    __intel_open_device函数在同文件中实现，代码如下：

    1. static int __intel_open_device(const struct pci_device *pci, const char *path)
    2. {
    3. 	int fd;
    4.  
    5. 	if (path == NULL) {
    6. 		if (pci == NULL)
    7. 			return -1;
    8.  
    9. 		fd = __intel_open_device__pci(pci);
    10. 		if (fd == -1)
    11. 			fd = __intel_open_device__legacy(pci);
    12. 	} else
    13. 		fd = open_cloexec(path);
    14.  
    15. 	return fd;
    16. }

    __intel_open_device函数中包含的2个函数都比较大，我们在下一篇文章中进行分析。

  • 相关阅读:
    分享：互信息在对比学习中的应用
    Jmeter跨线程参数关联无需脚本
    resnet152 辣椒病虫害图像识别1.0
    第十四章 手动创建 REST 服务（二）
    Docker常见面试题集锦
    python数学建模--时间序列模型--指数平滑
    SpringBoot+Shiro+Vue实现身份验证
    通过canvas获取图片的颜色值
    Rust 中 Actor 并发模型的实践与使用
    ChatGPT手机电脑浏览器中使用免费的ChatGPT
  • 原文地址：https://blog.csdn.net/phmatthaus/article/details/128033468