[ 3.239150] xilinx-zynqmp-dma fd500000.dma: ZynqMP DMA driver Probe success
[ 3.246330] xilinx-zynqmp-dma fd510000.dma: ZynqMP DMA driver Probe success
[ 3.253506] xilinx-zynqmp-dma fd520000.dma: ZynqMP DMA driver Probe success
[ 3.260680] xilinx-zynqmp-dma fd530000.dma: ZynqMP DMA driver Probe success
[ 3.267850] xilinx-zynqmp-dma fd540000.dma: ZynqMP DMA driver Probe success
[ 3.275015] xilinx-zynqmp-dma fd550000.dma: ZynqMP DMA driver Probe success
[ 3.282182] xilinx-zynqmp-dma fd560000.dma: ZynqMP DMA driver Probe success
[ 3.289360] xilinx-zynqmp-dma fd570000.dma: ZynqMP DMA driver Probe success
[ 3.296600] xilinx-zynqmp-dma ffa80000.dma: ZynqMP DMA driver Probe success
[ 3.303786] xilinx-zynqmp-dma ffa90000.dma: ZynqMP DMA driver Probe success
[ 3.310969] xilinx-zynqmp-dma ffaa0000.dma: ZynqMP DMA driver Probe success
[ 3.318138] xilinx-zynqmp-dma ffab0000.dma: ZynqMP DMA driver Probe success
[ 3.325305] xilinx-zynqmp-dma ffac0000.dma: ZynqMP DMA driver Probe success
[ 3.332476] xilinx-zynqmp-dma ffad0000.dma: ZynqMP DMA driver Probe success
[ 3.339648] xilinx-zynqmp-dma ffae0000.dma: ZynqMP DMA driver Probe success
[ 3.346820] xilinx-zynqmp-dma ffaf0000.dma: ZynqMP DMA driver Probe success
[ 3.354214] xilinx-zynqmp-dpdma fd4c0000.dma-controller: Xilinx DPDMA engine is probed
[ 3.362327] xilinx-psgtr fd400000.phy: Invalid reference clock number 2
[ 3.368941] zynqmp-display fd4a0000.display: failed to get PHY lane 0
[ 3.375401] zynqmp-display: probe of fd4a0000.display failed with error -22
[ 3.382826] macb ff0e0000.ethernet: Not enabling partial store and forward
[ 3.390418] libphy: MACB_mii_bus: probed
1、问题描述：
7ev系统内核启动时，报错：xilinx-psgtr fd400000.phy: Invalid reference clock number 2
2、原因分析：
7ev默认自动生成pcw.dtsi文件中的设备树的设置为：
&zynqmp_dpsub {
phy-names = "dp-phy0","dp-phy1";
phys = <&psgtr 1 6 0 2>, <&psgtr 0 6 1 2>;
status = "okay";
xlnx,max-lanes = <2>;
};
如上设备树配置所示，设备树phys配置的参考时钟是"2"通道。但是实际上，硬件原理图使用的是ref_clk_1。硬件连接和xsa文件的配置不一致导致的问题。
3、解决方法：
修改vivado，将参考时钟设置为"1"，和硬件原理图对应起来。即可解决问题。