• 01 ARM Cortex-M3指令集汇总


    ARM Cortex-M3指令集汇总

    作者将狼才鲸
    创建日期2022-11-06
    Table 3-1 Cortex-M3 instruction set summary
    OperationDescriptionAssemblerCycles
    MoveRegisterMOV Rd, 1
    16-bit immediateMOVW Rd, #1
    Immediate into topMOVT Rd, #1
    To PCMOV PC, Rm1 + P
    AddAddADD Rd, Rn, 1
    Add to PCADD PC, PC, Rm1 + P
    Add with carryADC Rd, Rn, 1
    Form addressADR Rd, 1
    SubtractSubtractSUB Rd, Rn, 1
    Subtract with borrowSBC Rd, Rn, 1
    ReverseRSB Rd, Rn, 1
    MultiplyMultiplyMUL Rd, Rn, Rm1
    Multiply accumulateMLA Rd, Rn, Rm2
    Multiply subtractMLS Rd, Rn, Rm2
    Long signedSMULL RdLo, RdHi, Rn, Rm3 to 5
    Long unsignedUMULL RdLo, RdHi, Rn, Rm3 to 5
    Long signed accumulateSMLAL RdLo, RdHi, Rn, Rm4 to 7
    Long unsigned accumulateUMLAL RdLo, RdHi, Rn, Rm4 to 7
    DivideSignedSDIV Rd, Rn, Rm
    UnsignedUDIV Rd, Rn, Rm2 to 12
    SaturateSignedSSAT Rd, #,
    UnsignedUSAT Rd, #, 1
    CompareCompareCMP Rn, 1
    NegativeCMN Rn, 1
    LogicalANDAND Rd, Rn, 1
    Exclusive OREOR Rd, Rn, 1
    ORORR Rd, Rn, 1
    OR NOTORN Rd, Rn, 1
    Bit clearBIC Rd, Rn, 1
    Move NOTMVN Rd, 1
    AND testTST Rn, 1
    Exclusive OR testTEQ Rn,
    ShiftLogical shift leftLSL Rd, Rn, #1
    Logical shift leftLSL Rd, Rn, Rs1
    Logical shift rightLSR Rd, Rn, #1
    Logical shift rightLSR Rd, Rn, Rs1
    Arithmetic shift rightASR Rd, Rn, #1
    Arithmetic shift rightASR Rd, Rn, Rs1
    RotateRotate rightROR Rd, Rn, #1
    Rotate rightROR Rd, Rn, Rs1
    With extensionRRX Rd, Rn1
    CountLeading zeroesCLZ Rd, Rn1
    LoadWordLDR Rd, [Rn, ]2
    To PCLDR PC, [Rn, ]2 + P
    HalfwordLDRH Rd, [Rn, ]2
    ByteLDRB Rd, [Rn, ]2
    Signed halfwordLDRSH Rd, [Rn, ]2
    Signed byteLDRSB Rd, [Rn, ]2
    User wordLDRT Rd, [Rn, #]2
    User halfwordLDRHT Rd, [Rn, #]2
    User byteLDRBT Rd, [Rn, #]2
    User signed halfwordLDRSHT Rd, [Rn, #]2
    User signed byteLDRSBT Rd, [Rn, #]2
    PC relativeLDR Rd,[PC, #]2
    DoublewordLDRD Rd, Rd, [Rn, #]1 + N
    MultipleLDM Rn, {}1 + N
    Multiple including PCLDM Rn, {, PC}1 + N + P
    StoreWordSTR Rd, [Rn, ]2
    HalfwordSTRH Rd, [Rn, ]2
    ByteSTRB Rd, [Rn, ]2
    Signed halfwordSTRSH Rd, [Rn, ]2
    Signed byteSTRSB Rd, [Rn, ]2
    User wordSTRT Rd, [Rn, #]2
    User halfwordSTRHT Rd, [Rn, #]2
    User byteSTRBT Rd, [Rn, #]2
    User signed halfwordSTRSHT Rd, [Rn, #]2
    User signed byteSTRSBT Rd, [Rn, #]2
    DoublewordSTRD Rd, Rd, [Rn, #]1 + N
    MultipleSTM Rn, {}1 + N
    PushPushPUSH {}
    Push with link registerPUSH {, LR}1 + N
    PopPopPOP {}
    Pop and returnPOP {, PC}1 + N + P
    SemaphoreLoad exclusiveLDREX Rd, [Rn, #]2
    Load exclusive halfLDREXH Rd, [Rn]2
    Load exclusive byteLDREXB Rd, [Rn]2
    Store exclusiveSTREX Rd, Rt, [Rn, #]2
    Store exclusive halfSTREXH Rd, Rt, [Rn]2
    Store exclusive byteSTREXB Rd, Rt, [Rn]2
    Clear exclusive monitorCLREX1
    BranchConditionalB 1 or 1 + P
    UnconditionalB 1 + P
    With linkBL 1 + P
    With exchangeBX Rm1 + P
    With link and exchangeBLX Rm1 + P
    Branch if zeroCBZ Rn, 1 or 1 + P
    Branch if non-zeroCBNZ Rn, 1 or 1 + P
    Byte table branchTBB [Rn, Rm]2 + P
    Halfword table branchTBH [Rn, Rm, LSL#1]2 + P
    State changeSupervisor callSVC #-
    If-then-elseIT… 1
    Disable interruptsCPSID 1 or 2
    Enable interruptsCPSIE 1 or 2
    Read special registerMRS Rd, 1 or 2
    Write special registerMSR , Rn1 or 2
    BreakpointBKPT #-
    ExtendSigned halfword to wordSXTH Rd, 1
    Signed byte to wordSXTB Rd, 1
    Unsigned halfwordUXTH Rd, 1
    Unsigned byteUXTB Rd, 1
    Bit fieldExtract unsignedUBFX Rd, Rn, #, #1
    Extract signedSBFX Rd, Rn, #, #1
    ClearBFC Rd, Rn, #, #1
    InsertBFI Rd, Rn, #, #1
    ReverseBytes in wordREV Rd, Rm1
    Bytes in both halfwordsREV16 Rd, Rm1
    Signed bottom halfwordREVSH Rd, Rm1
    Bits in wordRBIT Rd, Rm1
    HintSend eventSEV1
    Wait for eventWFE1 + W
    Wait for interruptWFI1 + W
    No operationNOP1
    BarriersInstruction synchronizationISB1 + B
    Data memoryDMB1 + B
    Data synchronizationDSB 1 + B
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  • 原文地址:https://blog.csdn.net/qq582880551/article/details/127711502